FACTOID # 10: The total number of state executions in 2005 was 60: 19 in Texas and 41 elsewhere. The racial split was 19 Black and 41 White.
 
 Home   Encyclopedia   Statistics   States A-Z   Flags   Maps   FAQ   About 
   
 
WHAT'S NEW
 

SEARCH ALL

FACTS & STATISTICS    Advanced view

Search encyclopedia, statistics and forums:

 

 

(* = Graphable)

 

 


Encyclopedia > Semiconductor fabrication
NASA's Glenn Research Center cleanroom.
NASA's Glenn Research Center cleanroom.

Semiconductor device fabrication is the process used to create chips, the integrated circuits that are present in everyday electrical and electronic devices. It is a multiple-step sequence of photographic and chemical processing steps during which electronic circuits are gradually created on a wafer made of pure semiconducting material. Silicon is the most commonly used semiconductor material today, along with gallium arsenide, germanium, hafnium, and some other materials. Image File history File links Please see the file description page for further information. ... Image File history File links Please see the file description page for further information. ... NASAs Glenn Research Center cleanroom. ... Integrated circuit showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window showing the integrated circuit inside. ... The article on electrical energy is located elsewhere. ... The field of electronics comprises the study and use of systems that operate by controlling the flow of electrons (or other charge carriers) in devices such as thermionic valves (vacuum tubes) and semiconductors. ... An etched silicon wafer In microelectronics, a wafer is a thin slice of semiconducting material, such as a silicon crystal, upon which microcircuits are constructed by doping (for example, diffusion or ion implantation), etching, and deposition of various materials. ... A semiconductor is a solid whose electrical conductivity can be controlled over a wide range, either permanently or dynamically. ... General Name, Symbol, Number silicon, Si, 14 Chemical series metalloids Group, Period, Block 14, 3, p Appearance as coarse powder, dark gray with bluish tinge Atomic mass 28. ... This article is about the chemical compound. ... General Name, Symbol, Number germanium, Ge, 32 Chemical series metalloids Group, Period, Block 14, 4, p Appearance grayish white Atomic mass 72. ... General Name, Symbol, Number hafnium, Hf, 72 Chemical series transition metals Group, Period, Block 4, 6, d Appearance gray steel Atomic mass 178. ...


The entire manufacturing process from start to packaged chips ready for shipment takes six to eight weeks.

Contents

Wafers

A typical wafer is made out of extremely pure silicon that is grown into mono-crystalline cylindrical ingots (boules) up to 12 in (300 mm) in diameter using the Czochralski process. These ingots are then sliced into wafers about 0.75 mm thick and polished to obtain a very regular and flat surface. See Wafer (cooking) for the original meaning of the word. ... General Name, Symbol, Number silicon, Si, 14 Chemical series metalloids Group, Period, Block 14, 3, p Appearance as coarse powder, dark gray with bluish tinge Atomic mass 28. ... A single crystal is a crystalline solid in which the crystal lattice of the entire sample is continuous and unbroken to the edges of the sample. ... An ingot is a mass of metal or semiconducting material, heated past the melting point, and then recast, typically into the form of a bar or block. ... A boule is a term used to describe a single crystal ingot produced by synthetic means. ... The Czochralski process is a method of crystal growth used to obtain single crystals of semiconductors (e. ...


Once the wafers are prepared, many process steps are necessary to produce the desired semiconductor integrated circuit. In general, the steps can be grouped into four areas:

  • Front end processing
  • Back end processing
  • Test
  • Packaging.

Processing

In semiconductor device fabrication, the various processing steps fall into four general categories: deposition, removal, patterning, and modification of electrical properties.

  • Deposition is any process that grows, coats, or otherwise transfers a material onto the wafer. Available technologies consist of physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), molecular beam epitaxy (MBE) and more recently, atomic layer deposition (ALD) among others.
  • Removal processes are any that remove material from the wafer either in bulk or selective form and consist primarily of etch processes, both wet etching and dry etching such as reactive ion etch (RIE). Chemical-mechanical planarization (CMP) is also a removal process used between levels.
  • Patterning covers the series of processes that shape or alter the existing shape of the deposited materials and is generally referred to as lithography. For example, in conventional lithography, the wafer is coated with a chemical called a “photoresist.” The photoresist is exposed by a “stepper”, a machine that focuses, aligns, and moves the mask, exposing select portions of the wafer to short wavelength light. The unexposed regions are washed away by a developer solution. After etching or other processing, the remaining photoresist is removed by plasma ashing.
  • Modification of electrical properties has historically consisted of doping transistor sources and drains originally by diffusion furnaces and later by ion implantation. These doping processes are followed by furnace anneal or in advanced devices, by rapid thermal anneal (RTA) which serve to activate the implanted dopants. Modification of electrical properties now also extends to reduction of dielectric constant in low-k insulating materials via exposure to ultraviolet light in UV processing (UVP).

Many modern chips have eight or more levels produced in over 300 sequenced processing steps. Physical vapor deposition (PVD) is a technique used to deposit thin films of various materials onto various surfaces (e. ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Molecular beam epitaxy, abbreviated MBE, is the deposition of one or more pure materials onto a single crystal wafer, one layer of atoms at a time, under ultra-high vacuum, forming a perfect crystal. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... Wet etching is the removal of material by immersing the wafer in a liquid bath of chemical etchant. ... Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of Nitrogen, Chlorine and Boron Trichloride) that dislodge portions of the material from the exposed surface. ... Chemical-mechanical planarization or Chemical-mechanical polishing, commonly abbreviated CMP, is a technique used in semiconductor fabrication for planarizing the top surface of an in-process semiconductor wafer or other substrate. ... Negative lithography stone and positive print of a map of Munich. ... It has been suggested that this article or section be merged with resist. ... A stepper is a device used in the manufacture of integrated circuits (ICs) that is similar in operation to a slide projector or a photographic enlarger. ... In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer. ... Ion implantation is a materials engineering process by which ions of a material can be implanted into another solid, thereby changing the physical properties of the solid. ... Furnace anneal is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties. ... Rapid thermal anneal (RTA) is a process used in semiconductor device fabrication which consists of heating a single wafer at a time in order to affect its electrical properties. ...


Front End Processing

"Front End Processing" refers to the formation of the transistors directly on the silicon. The raw wafer is engineered by the growth of an ultrapure, virtually defect-free silicon layer through epitaxy. In the most advanced logic devices, prior to the silicon epitaxy step, tricks are performed to improve the performance of the transistors to be built. One method involves introducing a "straining step" wherein a silicon variant such as "silicon-germanium" (SiGe) is deposited. Once the epitaxial silicon is deposited, the crystal lattice becomes stretched somewhat, resulting in improved electronic mobility. Another method, called "silicon on insulator" technology involves the insertion of an insulating layer between the raw silicon wafer and the thin layer of subsequent silicon epitaxy. This method results in the creation of transistors with reduced parasitic effects. Assorted transistors A transistor is a semiconductor device that uses a small amount of voltage or electrical current to control a larger change in voltage or current. ... General Name, Symbol, Number silicon, Si, 14 Chemical series metalloids Group, Period, Block 14, 3, p Appearance as coarse powder, dark gray with bluish tinge Atomic mass 28. ... Epitaxy is the growth of crystals of one material on the crystal face of another (heteroepitaxy) or the same (homoepitaxy) material, such that the two materials have a defined relative structural orientation. ... SiGe stands for Silicon-Germanium heterojunction bipolar transistor and is an integrated circuit (IC) manufacturing technology. ... Silicon on insulator (SOI) is a layered structure consisting of a thin layer of silicon, from 50 nm to 100 µm, which is created on an insulating substrate, which is usually sapphire or silicon with an insulating layer of silicon dioxide(SiO2) 80 nm to 3 µm thick on its...


Silicon dioxide

Front end surface engineering is followed by: growth of the gate dielectric, traditionally silicon dioxide (SiO2), patterning of the gate, patterning of the source and drain regions, and subsequent implantation or diffusion of dopants to obtain the desired complementary electrical properties. In memory devices, storage cells, conventionally capacitors, are also fabricated at this time, either into the silicon surface or stacked above the transistor. R-phrases R42 R43 R49 S-phrases S22 S36 S37 S45 S53 Flash point non-flammable Supplementary data page Structure and properties n, εr, etc. ... Various types of capacitors A capacitor is a device that stores energy in the electric field created between a pair of conductors on which equal but opposite electric charges have been placed. ...


Metal layers

Once the various semiconductor devices have been created they must be interconnected to form the desired electrical circuits. This "Back End Of Line" (BEOL – the latter portion of the front end of wafer fabrication, not to be confused with "back end" of chip fabrication which refers to the package and test stages) involves creating metal interconnecting wires that are isolated by insulating dielectrics. The insulating material was traditionally a form of SiO2 or a silicate glass, but recently new low dielectric constant materials are being used. These dielectrics presently take the form of SiOC and have dielectric constants around 2.7 (compared to 3.9 for SiO2), although materials with constants as low as 2.2 are being offered to chipmakers. Silicate glasses have been commonly used in the field of semiconductor device fabrication as an insulator between active layers of the semiconductor device. ... A Low-K dielectric is one with a small dielectric constant. ...


Interconnect

Historically, the metal wires consisted of aluminum. In this approach to wiring often called "subtractive aluminum", blanket films of aluminum are deposited first , patterned, and then etched, leaving isolated wires. Dielectric material is then deposited over the exposed wires. The various metal layers are interconnected by etching holes, called "vias," in the insulating material and depositing tungsten in them with a CVD technique. This approach is still used in the fabrication of many memory chips such as dynamic random access memory (DRAM) as the number of interconnect levels is small, currently no more than four. Aluminum is a soft and lightweight metal with a dull silvery appearance, due to a thin layer of oxidation that forms quickly when it is exposed to air. ... General Name, Symbol, Number tungsten, W, 74 Chemical series transition metals Group, Period, Block 6, 6, d Appearance grayish white, lustrous Atomic mass 183. ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Dynamic random access memory (DRAM) is a type of random access memory that stores each bit of data in a separate capacitor. ...


More recently, as the number of interconnect levels for logic has substantially increased due to the large number of transistors that are now interconnected in a modern microprocessor, the timing delay in the wiring has become significant prompting a change in wiring material from aluminum to copper and from the aforementioned silicon dioxides to newer low-K material. This performance enhancement also comes at a reduced cost via damascene processing that eliminates processing steps. In damascene processing, in contrast to subtractive aluminum technology, the dielectric material is deposited first as a blanket film and is patterned and etched leaving holes or trenches. In "single damascene" processing, copper is then deposited in the holes or trenches surrounded by a thin barrier film resulting in filled vias or wire "lines" respectively. In "dual damascene" technology, both the trench and via are fabricated before the deposition of copper resulting in formation of both the via and line simultaneously, further reducing the number of processing steps. The thin barrier film, called Copper Barrier Seed (CBS), is a necessary evil to prevent copper diffusion into the dielectric. The ideal barrier film is effective, but is barely there. As the presence of excessive barrier film competes with the available copper wire cross section, formation of the thinnest yet continuous barrier represents one of the greatest ongoing challenges in copper processing today. A microprocessor (sometimes abbreviated µP) is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... General Name, Symbol, Number copper, Cu, 29 Chemical series transition metals Group, Period, Block 11, 4, d Appearance metallic pinkish red Atomic mass 63. ...


As the number of interconnect levels increases, planarization of the previous layers is required to ensure a flat surface prior to subsequent lithography. Without it, the levels would become increasingly crooked and extend outside the depth of focus of available lithography, interfering with the ability to pattern. CMP is the primary processing method to achieve such planarization although dry "etch back" is still sometimes employed if the number of interconnect levels is no more than three.


Wafer test

The highly serialized nature of wafer processing has increased the demand for metrology in between the various processing steps. Wafer test metrology equipment is used to verify that the wafers are still good and haven't been damaged by previous processing steps. If the number of dies—the integrated circuits that will eventually become a chip—on a wafer that measure as fails exceed a predetermined threshold, the wafer is scrapped rather than investing in further processing.


Device test

Once the Back End Processing has been completed, the semiconductor devices are subjected to a variety of electrical tests to determine if they function properly. The proportion of devices on the wafer found to perform properly is referred to as the yield.


The fab tests the chips on the wafer with an electronic tester that presses tiny probes against the chip. The machine marks the bad chips with a drop of dye. The fab charges for test time; the prices are on the order of cents per second. Chips are often designed with “testability features” to speed testing, and reduce test costs. Wafer testing is a step performed during semiconductor device fabrication. ...


A good chip design made by a good process will have more than 90% yield. Anywhere between 0% and 70% yield wastes too much silicon, losing money.


Good designs try to test and statistically manage corners: extremes of silicon behavior caused by operating temperature combined with the extremes of fab processing steps. Most designs cope with more than 64 corners.


Packaging

Once tested, the wafer is scored and then broken into individual dice. Only the good, undyed chips go on to be packaged.


Plastic or ceramic packaging involves mounting the die, connecting the die pads to the pins on the package, and sealing the die. Tiny wires are used to connect pads to the pins. In the old days, wires were attached by hand, but now purpose-built machines perform the task. Traditionally, the wires to the chips were gold, leading to a “lead frame” (pronounced “leed frame”) of copper, that had been plated with solder, a mixture of tin and lead. Lead is poisonous, so lead-free “lead frames” are now the best practice.


Chip-scale package (CSP) is another packaging technology. Plastic packaged chips are usually considerably larger than the actual die, whereas CSP chips are nearly the size of the die. CSP can be constructed for each die before the wafer is diced [1].


The packaged chips are retested to ensure that they were not damaged during packaging and that the die-to-pin interconnect operation was performed correctly. A laser etches the chip’s name and numbers on the package.


List of steps

  • Wafer processing

This is a list of processing techniques that are employed numerous times in a modern electronic device and do not necessarily imply a specific order.

Photolithography is a process used in semiconductor device fabrication to transfer a pattern from a photomask (also called reticle) to the surface of a substrate. ... Ion implantation is a materials engineering process by which ions of a material can be implanted into another solid, thereby changing the physical properties of the solid. ... A dopant, also called doping agent and dope, is an impurity element added to a semiconductor lattice in low concentrations in order to alter the optical/electrical properties of the semiconductor. ... Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of Nitrogen, Chlorine and Boron Trichloride) that dislodge portions of the material from the exposed surface. ... Wet etching is the removal of material by immersing the wafer in a liquid bath of chemical etchant. ... In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer. ... Rapid thermal anneal (RTA) is a process used in semiconductor device fabrication which consists of heating a single wafer at a time in order to affect its electrical properties. ... Furnace anneal is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties. ... In microfabrication, thermal oxidation is a way to produce a thin layer of oxide (usually silicon dioxide) on the surface of a wafer (semiconductor). ... DC plasma (violet) enhances the growth of carbon nanotubes in this laboratory-scale PECVD apparatus. ... Physical vapor deposition (PVD) is a technique used to deposit thin films of various materials onto various surfaces (e. ... Molecular beam epitaxy, abbreviated MBE, is the deposition of one or more pure materials onto a single crystal wafer, one layer of atoms at a time, under ultra-high vacuum, forming a perfect crystal. ... Electroplating involves the coating of an electrically conductive object with a layer of metal using electrical current. ... Chemical-mechanical planarization or Chemical-mechanical polishing, commonly abbreviated CMP, is a technique used in semiconductor fabrication for planarizing the top surface of an in-process semiconductor wafer or other substrate. ... Wafer testing is a step performed during semiconductor device fabrication. ... A smart card, or integrated circuit(s) card (ICC), is defined as any integrated circuitry embedded into a flat, plastic body. ... The PCMCIA is the Personal Computer Memory Card International Association, an industry trade association that creates standards for notebook computer peripheral devices. ... Die preparation is a step of semiconductor device fabrication during which a wafer is prepared for IC packaging and IC testing. ... Wafer mounting is a step that is performed during the die preparation of a wafer as part of the process of semiconductor device fabrication. ... During the die cutting or dicing process, a wafer with sometimes thousands of identical integrated circuits is cut into individual pieces, called dies. ... Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing. ... Die attachment is the step during the integrated circuit packaging phase of semiconductor device fabrication during which a die is mounted and fixed to the package. ... Wire bonding is a method of making interconnections between a microchip and the outside world as part of semiconductor device fabrication. ... A flip chip is one type of IC chip mounting which does not require any wire bonds. ... Integrated circuit encapsulation (IC encapsulation, encapsulation) is design and manufacturing of protective packages for integrated circuits. ... Wikibooks Cookbook has an article on Baking Baking is the technique of cooking food in an oven by dry heat applied evenly throughout the oven or only from the bottom element. ... This article or section is in need of attention from an expert on the subject. ... NASAs Glenn Research Center cleanroom. ...

Hazardous materials note

Many toxic materials are used in the fabrication process. These include:

It is vital that workers not be directly exposed to these dangerous substances. The high degree of automation common in the IC fabrication industry helps to reduce the risks of exposure of this sort. A dopant is an impurity that is added in small amounts to a pure substance to change its properties. ... General Name, Symbol, Number arsenic, As, 33 Chemical series metalloids Group, Period, Block 15, 4, p Appearance metallic gray Atomic mass 74. ... General Name, Symbol, Number boron, B, 5 Chemical series metalloids Group, Period, Block 13, 2, p Appearance black/brown Atomic mass 10. ... General Name, Symbol, Number antimony, Sb, 51 Chemical series metalloids Group, Period, Block 15, 5, p Appearance silvery lustrous grey Atomic mass 121. ... General Name, Symbol, Number phosphorus, P, 15 Chemical series nonmetals Group, Period, Block 15, 3, p Appearance waxy white/ red/ black/ colorless Atomic mass 30. ... Arsine, the simplest compound of arsenic, is AsH3. ... Phosphine is the common name for phosphorus hydride (PH3), also known by the IUPAC name phosphane and, occasionally, phosphamine. ... Silane is a chemical compound with chemical formula SiH4. ... Hydrogen peroxide (H2O2) is a very pale blue liquid which appears colourless in a dilute solution, slightly more viscous than water. ... The chemical compound nitric acid (HNO3), also known as aqua fortis and spirit of nitre, is an aqueous solution of hydrogen nitrate (anhydrous nitric acid). ... Sulfuric acid (British English: sulphuric acid), H2SO4, is a strong mineral acid. ... Hydrofluoric acid is a highly toxic and corrosive solution of hydrogen fluoride in water. ...


History

When feature widths were far greater than about 10 micrometres, purity was not the issue that it is today in device manufacturing. But as the devices became more integrated the cleanrooms became even cleaner. Today, the facilities, known as fabs, are pressurized with filtered air, to remove even the smallest particles which could come to rest on the wafers and contribute to defects. The workers in a semiconductor fabrication facility are required to wear cleanroom suits to protect the devices from human contamination. A micrometre (American spelling: micrometer, symbol µm) is an SI unit of length equal to one millionth of a metre, or about a tenth of the size of a droplet of mist or fog. ... NASAs Glenn Research Center cleanroom. ... It has been suggested that this article or section be merged into Fabrication plant. ... Defect is the n00b of the animating world, everybody knows that he cannot and will not animate. ... This article needs to be cleaned up to conform to a higher standard of quality. ...


In an effort to increase profits, semiconductor device manufacture spread from Texas and California in the 1960s to the rest of the world, such as Ireland, Israel, Japan, Taiwan, Korea, Singapore and China, and is a global business today. Official language(s) English (de facto) See also languages of Texas Capital Austin Largest city Houston Area  Ranked 2nd  - Total 268,581 sq mi (695,622 km²)  - Width 773 miles (1,244 km)  - Length 790 miles (1,270 km)  - % water 2. ... Official language(s) English Capital Sacramento Largest city Los Angeles Area  Ranked 3rd  - Total 158,302 sq mi (410,000 km²)  - Width 250 miles (400 km)  - Length 770 miles (1,240 km)  - % water 4. ... The 1960s decade refers to the years from January 1, 1960 to December 31, 1969, inclusive. ... Korea (Korean: 한국 or ì¡°ì„ , see below) is a geographic area, civilization, and former state situated on the Korean Peninsula in East Asia. ...


The leading semiconductor manufacturers typically have facilities all over the world. Intel, the world's largest manufacturer, has facilities in Europe and Asia as well as the U.S. Other top manufacturers include Samsung (Korea), Texas Instruments (US), Advanced Micro Devices (AMD) (US) see [2], Toshiba (Japan), NEC Electronics (Japan), STMicroelectronics (Europe), Infineon (Europe), Renesas (Japan), Taiwan Semiconductor Manufacturing Company (Taiwan, see TSMC web site), Sony(Japan), and NXP Semiconductors (Europe). Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Samsung Group is one of the largest South Korean business groupings. ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... AMD redirects here. ... Toshiba Corporations headquarters in Hamamatsucho, Tokyo Toshiba Corporation sales by division for year ending March, 31 2005 Toshiba Corporation ) (TYO: 6502 ) is a Japanese high technology electrical and electronics manufacturing firm, headquartered in Tokyo, Japan. ... STMicroelectronics is an international leading supplier of semiconductors. ... Infineon Technologies is a German manufacturer of integrated circuits and related products. ... Renesas Technology Corp. ... Taiwan Semiconductor Manufacturing Company, Limited (Traditional Chinese: 台灣積體電路製造股份有限公司, abbrev. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... For other uses of NXP, see NXP (disambiguation). ...


In 2006, there are approximately 5,000 semi-conductor and electronic components manufacturers in the United States, accounting for $165 billion, according to the 2006 U.S. Industry & Market Outlook by Barnes Reports.


See also

Microfabrication is the collective term for the technologies used to fabricate components on a micrometer-sized scale. ... PCB Layout Program Electronic design automation (EDA) is the category of tools for designing and producing electronic systems ranging from printed circuit boards (PCBs) to integrated circuits. ... It has been suggested that this article or section be merged into Fabrication plant. ... In the microelectronics industry, foundry (also called a fab for fabrication plant) is used to refer to a factory where devices like integrated circuits are manufactured. ... GDSII is a database format, which in the integrated circuit industry has been the de facto standard for IC layout data exchange for more than two decades. ... Open Artwork System Interchange Standard (OASIS (TM)) is a specification for hierarchical integrated circuit mask layout data format for interchange between EDA software, IC mask writing tools and mask inspection tools. ... Semiconductor Equipment and Materials International (SEMI) is a trade organization of manufacturers of equipment and materials used in the fabrication of semiconductor devices such as integrated circuits, transistors, diodes, and thyristors. ... To meet Wikipedias quality standards, this article or section may require cleanup. ...

External links


  Results from FactBites:
 
Semiconductor fabrication - Wikipedia, the free encyclopedia (1822 words)
Semiconductor device fabrication is the process used to create chips, the integrated circuits that are present in everyday electrical and electronic devices.
The workers in a semiconductor fabrication facility are required to wear cleanroom suits to protect the devices from human contamination.
In an effort to increase profits, semiconductor device manufacture spread from Texas and California in the 1960s to the rest of the world, such as Ireland, Israel, Japan, Taiwan, Korea, Singapore and China, and is a global business today.
Britney Spears guide to Semiconductor Physics: Fabrication of VCSELs. (1968 words)
The next stage of the fabrication process is to turn the single crystal of semiconductor material into many thinly sliced wafers.
The mean free path of the atoms is long enough under the conditions of vacuum within the bell-jar to eventually coat the surface of the semiconductor.
Etching may be required in the fabrication of VCSELs, for example to create the mesa structure of air post VCSELs or in creating areas for re-growth for current blocking layers.
  More results at FactBites »

 
 

COMMENTARY     


Share your thoughts, questions and commentary here
Your name
Your comments

Want to know more?
Search encyclopedia, statistics and forums:

 


Press Releases |  Feeds | Contact
The Wikipedia article included on this page is licensed under the GFDL.
Images may be subject to relevant owners' copyright.
All other elements are (c) copyright NationMaster.com 2003-5. All Rights Reserved.
Usage implies agreement with terms, 1022, m