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Encyclopedia > Pixel pipeline

A pixel pipeline is a video card part that transfers pixel information. The more pixel pipelines, the faster the video card can process pixels. A GeForce 4 4200-based graphics card A graphics card or video card is a component of a computer which is designed to convert a logical representation of an image stored in memory to a signal that can be used as input for a display medium, most often a monitor...


Current top-end videocards, such as the Radeon X1800 XT and the GeForce 7800 GTX, offer 16 and 24 pixel pipelines respectively.


See also

Vertex and pixel (or fragment) shaders are shaders that run on a graphics card, executed once for every vertex or pixel in a specified 3D mesh. ... In 3D computer graphics, the terms graphics pipeline or rendering pipeline most commonly refer to the current state of the art method of rasterization-based rendering as supported by commodity graphics hardware. ...

External links

  • "TechEncyclopedia (Graphics Pipeline)"
  • "ExtremeTech 3D Pipeline Tutorial" by Dave Salvator, Extremetech.Com, July 13, 2001

  Results from FactBites:
 
GeForce 7 Series - Wikipedia, the free encyclopedia (997 words)
It is a natively PCI Express chip, but use of a bridge chip could allow an AGP version to be produced (early versions of the GeForce 6800 series were natively AGP and used a bridge chip to convert to PCI Express).
Rumours had suggested that the card actually had 32 pixel pipelines, though this has since turned out to be incorrect as the GPU's transistor count is insufficent for 32 pipelines.
It has 20 pixel pipelines, 7 vertex shaders, 16 ROPs and a 400MHz core clock, 500MHz memory clock (1GHz effective) using GDDR3 memory.
ATI RADEON 9700 preview or DX9=R300*NV30 (3819 words)
Earlier, pixel shaders were used with stages - the number of texture stages was equal to the maximum number of textures used, the number of computational stages was equal to the maximum number of instructions.
Usually each pixel pipeline was given 2 or 4 stages (the Matrox Parhelia 512 had 5), and in case of a longer shader stages of 2 or 4 pipelines were combined in a chain.
In the near future pixel processors will become entire doubles (as to capabilities) of vertex ones because of the same data format and the same arithmetic instructions; the only thing lacking is an instruction order management, but this problem can be solved.
  More results at FactBites »

 
 

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