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Encyclopedia > Motorola 68060

The Motorola 68060 is a 32-bit microprocessor from Motorola, and is the successor to the Motorola 68040. The 68060 is the highest performance 680x0 family processor available.


The 68060 is not just a redesign of the 68040, but a from-scratch entirely new processor, adding a second integer pipeline, a two cycle integer multiplication unit, a faster FPU and a branch prediction logic. It has 2 to 3 times the performance capability of the 68040 at the same clockrate. The 68060 design was lead by Joe Circello.


The 68060 shares most architectural features with the original Pentium. Both have a very similar superscalar in-order dual instruction pipeline configuration, and an instruction decoder which breaks down complex instructions into simpler ones before execution. However, a significant difference is that the 68060 FPU is not pipelined and is therefore up to three times slower than the Pentium in floating point applications. In contrast to that, integer multiplications and bit shifting instructions are significantly faster on the 68060. An interesting feature of the 68060 is the ability to execute simple instructions in the address generation unit (AGU) and thereby supply the result two cycles before the ALU.


The 68060 was the last development of the 680x0 series for general purpose use, abandoned in favour of the PowerPC chips. It saw use in some late-model Amiga machines, but Apple Computer and the Unix world had moved onto various RISC platforms. 68060 was introduced at 50MHz on Motorola's 0.6μm manufacturing process. A few years later it was shrunk to 0.42μm and bumped to 66MHz and 75MHz. The 0.42μm parts were rare, as Motorola decided to concentrate on their PowerPC RISC project. Should Motorola have decided to stick with the 680x0 series it is very likely that the next processor would have resembled Intel's P6 architecture.


Perhaps its most memorable use was in American broadcast television graphics. Chyron's Infinit!, Max!, and Maxine! series of television character generators used the 68060 as the main processor. These character generators were a fixture on many American television networks' affiliate stations.


Developments of the basic core continue, intended for embedded systems. Here they are combined with a number of peripheral interfaces to reduce the overall complexity and power requirements of a design. A number of chips, each with different sets of interfaces, are sold under the name ColdFire and Dragonball.


For more information on the instruction set and architecture, see Motorola 68000.


References

This article was originally based on material from the Free On-line Dictionary of Computing, which is licensed under the GFDL.

Links

A paper describing the 68060 architecture (http://security-protocols.com/library/phreaking/68060Info.txt)

List of Motorola microprocessors

Motorola 6800 family | 6809 (see also: Hitachi 6309) | 68000 | 68008 | 68010 | 68012 | 68020 | 68030 | 68040 | 68060 | 88000 | Dragonball | Coldfire
PowerPC family (with IBM): PPC 7XX range (referred to as "PowerPC G3" by Apple) | PPC 7XXX range (referred to as "PowerPC G4" by Apple)


  Results from FactBites:
 
Motorola 68060 at AllExperts (761 words)
The Motorola 68060 is a 32-bit microprocessor from Motorola, released in 1994, and is the successor to the Motorola 68040.
For example, the Motorola 68010 (and the obscure 68012) was a 68000 with improvements to the loop instruction and the ability to suspend then continue an instruction in the event of a page fault, enabling the use of virtual memory with the appropriate MMU hardware.
Similarly, the Motorola 68030 was a process improvement on the 68020 with the MMU and a small cache (256 bytes) moved on-chip.
PDA Encyclopedia - Motorola 68000 (1984 words)
The Motorola 68000 is a CISC microprocessor, the first member of a successful family of microprocessors, which were all mostly software compatible.
Motorola ceased production of the 68000 in 2000, although derivatives, notably the CPU32 family, continue in production.
The Motorola 68901 had a number of severe defects, including the ability to lose the highest-priority interrupt if it and the clock interrupt happened within some window of each other.
  More results at FactBites »

 
 

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