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Encyclopedia > Memory segment

On the Intel x86 architecture, a memory segment is the portion of memory which may be addressed by a single index register without changing a 16-bit segment selector. In real mode or V86 mode, a segment is always 64 kibibytes in size (using 16-bit index registers). In protected mode, a segment can have variable length. Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... An index register in a computer CPU is a processor register used for modifying operand addresses during the run of a program, typically for doing vector/array operations. ... Real mode (also called real address mode in Intels manuals) is an operating mode of 80286 and later x86-compatible CPUs. ... In the 80386 and later, Virtual 8086 mode, also called virtual real mode, allows the execution of real mode applications that violated the rules mentioned here under the control of a protected mode operating system. ... A kibibyte (a contraction of kilo binary byte) is a unit of information or computer storage, commonly abbreviated KiB (never kiB). 1 kibibyte = 210 bytes = 1,024 bytes The kibibyte is closely related to the kilobyte, which can be used either as a synonym for kibibyte or to refer to...


In 16-bit real mode, enabling applications to make use of multiple memory segments (in order to access more memory than available in any one 64K-segment) was quite complex, but was viewed as a necessary evil for all but the smallest tools (which could do with less memory). The root of the problem was that no appropriate address-arithmetic instructions suitable for flat addressing of the entire memory range were available. Flat addressing is possible by applying multiple instructions, which however leads to slower programs. Real mode (also called real address mode in Intels manuals) is an operating mode of 80286 and later x86-compatible CPUs. ...


In protected mode, segmentation has a completely different meaning. Segmentation is a virtual memory scheme, like paging which although is supported on x86, is not supported on many other architectures. On the 386 and later, programs issue logical (48-bit) addresses (in a 16-bit segmented address space the middle 16-bit are 0, while in a 32-bit flat address space, the top 16-bit is not 0 (in fact it cannot be 0, since this means a null selector), but are the same for every such references (except code, because a segment cannot be readable, writable and executable at the same time)), which go through the segmentation unit to be translated into linear addresses (32-bit) before being sent to the paging unit (if enabled) which then translates those into physical addresses (also 32-bit). The segmentation unit works as follows: Protected mode is an operational mode of x86-compatible CPUs of the 80286 series or later. ... The memory pages of the virtual address space seen by the process, may reside non-contiguously in primary, or even secondary storage. ... In computer operating systems, paging memory allocation algorithms divide computer memory into small partitions, and allocates memory using a page as the smallest building block. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... Intel 80386 DX, 33MHz, foreground The Intel 80386 is a microprocessor which was used as the central processing unit (CPU) of many personal computers from 1986 until 1994 and later. ... In computer operating systems, paging memory allocation algorithms divide computer memory into small partitions, and allocates memory using a page as the smallest building block. ...


A logical address consists of a 16-bit segment selector and a 32-bit or 16-bit offset. The segment selector must be located in one of the segment registers: CS, DS, SS, ES, FS, GS. That selector consists of a 2-bit Requested Privilege Level (RPL, where the lowest number has the highest privilege), a 1-bit Table Indicator (TI), and a 13-bit index. The processor will index by the appropriate amount (times 8 since segment descriptors are 8 bytes) into the GDT (Global Descriptor Table) if TI=0, or the LDT (Local Descriptor Table) if TI=1. It then performs the following privilege check: Segmentation is one of the most common ways to achieve memory protection; another common one is paging. ... The Global Descriptor Table or GDT is a data structure used by Intel x86-family processors starting with the 80286 in order to define the characteristics of the various memory areas used during program execution, for example the base address, the size and access privileges like executability and writability. ... The Local Descriptor Table (LDT) is a memory table used in the x86 architecture in protected mode and containing memory segment descriptors: start in linear memory, size, executability, writability, access privilege, actual presence in memory, etc. ...


max(CPL, RPL) > DPL


where CPL is the current privilege level (lower 2 bits in CS), RPL is the requested privilege level from the segment selector, and DPL is the descriptor privilege level of the segment (found in the descriptor). If the equation is true, the processor generates a general protection fault (#GP). Otherwise, address translation continues. This privilege check is actually only done once, when the segment register is loaded since segment descriptors are cached in hidden parts of the segment registers.


The processor then takes the 32-bit or 16-bit offset and compares it against the segment limit specified in the segment desciptor. If it is larger, a GP fault is generated. Otherwise, the processor adds the segment base (32-bit or 24-bit, specified in descriptor) to the offset and this creates a linear address.


Logical addresses can be explicitly specified in x86 assembler language, e.g. (AT&T syntax): x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ...

 movl $42, %fs:(%eax) ; Equivalent to M[fs:eax]<-42) in RTL 

Usually, however, implied segments are used. All instruction fetches come from the code segment in the CS register. Most memory references come the from data segment in the DS register. Processor stack references, either implicitly (e.g. push and pop instructions) or explicitly (memory accesses using the ESP or (E)BP registers) use the stack segment in the SS register. Finally, string instructions (e.g. stos, movs) also use the extra segment ES. Register Transfer Language (RTL) is an intermediate representation used by the GCC compiler. ... In computing, a code segment, also known as a text segment or simply as text, is a phrase used to refer to a portion of memory or of an object file that contains executable computer instructions. ... Data is one of the sections of a program in an object file or in memory, which contains the global variables that are initialized by the programmer. ...


Segmentation cannot be turned off on x86 processors, so many operating systems use a flat memory model to make segmentation unnoticeable to programs. For instance, the Linux kernel sets up only 4 segments: In computer programming, the flat memory model is an approach to organizing memory address space. ... Linux (also known as GNU/Linux) is a Unix-like computer operating system. ...

 * __KERNEL_CS (Kernel code segment, base=0, limit=4GB, DPL=0) * __KERNEL_DS (Kernel data segment, base=0, limit=4GB, DPL=0) * __USER_CS (User code segment, base=0, limit=4GB, DPL=3) * __USER_DS (User data segment, base=0, limit=4GB, DPL=3) 

Since the base is set to 0 in all cases and the limit 4 GiB, the segmentation unit does not affect the addresses the program issues before they arrive at the paging unit. In computer operating systems, paging memory allocation algorithms divide computer memory into small partitions, and allocates memory using a page as the smallest building block. ...


Segments can be defined to be either code, data, or system segments. Additional permission bits are present to make segments read only, read/write, execute, etc.


Note that code may always modify all segment registers except CS (the code segment). This is because the current privilege level (CPL) of the processor is stored in the lower 2 bits of the CS register. The only way to raise the processor privilege level (and reload CS) is through the lcall (far call) and int (interrupt) instructions. Similarly, the only way to lower the privilege level (and reload CS) is through lret (far return) and iret (interrupt return). In computing, a code segment, also known as a text segment or simply as text, is a phrase used to refer to a portion of memory or of an object file that contains executable computer instructions. ...


For more about segmentation, see the IA-32 manuals freely available on the AMD or Intel websites. It has been suggested that this article or section be merged with X86 assembly language. ... Advanced Micro Devices, Inc. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ...


See also

Memory models in the C programming language are a way to specify assumptions that the compiler should make when generating code for segmented memory or paged memory platforms. ... Wiktionary has related dictionary definitions, such as: the The word the functions primarily as a definite article in the grammar of the English language. ...

External links

  • Home of the IA-32 Intel Architecture Software Developer's Manual

 
 

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