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Pentium with MMX
Pentium with MMX

MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium line of microprocessors, designated as "Pentium with MMX Technology".[1][2] It developed out of a similar unit first introduced on the Intel i860. It has been supported on most subsequent IA-32 processors by Intel and other vendors. Malmö Airport (also known as Malmö Sturup Airport) (IATA: MMX, ICAO: ESMS) is Swedens third busiest airport, located approximately 28 km (17. ... Mega Man X may refer to: Mega Man X (video game), a video game first released by Capcom in 1993 for the SNES. Mega Man X (series), a series of sequels and spin-offs based on the original game. ... 2010 (MMX) will be a common year starting on Friday of the Gregorian calendar. ... Image File history File links Emblem-important. ... Image File history File links PentiumMMX-presslogo. ... Image File history File links PentiumMMX-presslogo. ... -1... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... This article does not cite any references or sources. ... A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... The Intel i860 (also 80860, and code named N10) was a RISC microprocessor from Intel, first released in 1989. ... It has been suggested that this article or section be merged with X86 assembly language. ...


Intel's competitor AMD enhanced Intel's MMX with the 3DNow! instruction set to work with floating-point numbers. Intel would follow AMD's lead on floating-point math and create SSE two years later. Advanced Micro Devices, Inc. ... The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ... SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ...

Contents

Naming

MMX has been incorrectly said to stand for MultiMedia eXtension or Multiple Math or Matrix Math eXtension, but officially it is a meaningless initialism trademarked by Intel.[citation needed] (Note that AMD, during one of its numerous court battles with Intel, produced marketing material from Intel indicating that MMX stood for "Matrix Math Extensions". The idea that it stands for nothing is an Intel corporate position meant to suggest that it is of trademarked status and cannot be used by AMD or other x86 clone manufacturers in their own marketing material.)[3] Acronyms and initialisms are abbreviations formed from the initial letter or letters of words, such as NATO and XHTML, and are pronounced in a way that is distinct from the full pronunciation of what the letters stand for. ... “(TM)” redirects here. ... AMD redirects here. ...


Technical details

MMX added 8 new registers to the architecture, known as MM0 through MM7 (henceforth referred to as MMn). In reality, these new "registers" were just aliases for the existing x87 FPU stack registers. Hence, anything that was done to the floating point stack would also affect the MMX registers. Unlike the FP stack, these MMn registers were fixed, not relative, and therefore they were randomly accessible. In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ...


Each of the MMn registers is a 64-bit integer. However, one of the main concepts of the MMX instruction set is the concept of packed data types, which means instead of using the whole register for a single 64-bit integer (quadword), two 32-bit integers (doubleword), four 16-bit integers (word) or eight 8-bit integers (byte) may be used.


To simplify the design and to avoid modifying the operating system to preserve additional state through context switches, MMX re-uses the existing eight IA-32 FPU registers. This made it difficult to work with floating point and SIMD data at the same time. To maximize performance, programmers must use the processor exclusively in one mode or the other, deferring the relatively slow switch between them as long as possible. It has been suggested that this article or section be merged with X86 assembly language. ...


Also because the MMX's 64-bit MMn registers are aliased to the FPU stack, and each of the stack registers is 80 bits wide, the upper 16 bits of the stack registers go unused in MMX, and these bits are set to all ones, which makes it look like NaNs or infinities in the floating point view. This makes it easier to tell whether the work is on floating point data or MMX data. In computing, NaN (Not a Number) is a value or symbol that is usually produced as the result of an operation on invalid input operands, especially in floating-point calculations. ...


Another problem for MMX is that it only provides integer operations. Each of the eight 64-bit MMX vector registers, aliased on the eight existing floating point registers, could represent two 32-bit integers, four 16-bit short integers, or eight 8-bit chars. When originally developed in the i860, the use of vectored-integer math made sense (both 2D and 3D setup required it), but as the systems moved to using graphics cards that did this, MMX fell out of favor and vectored-floating point became much more important. On the other hand, its new arithmetic operations did include saturation arithmetic operations, which could significantly speed up some digital signal processing applications. The integers are commonly denoted by the above symbol. ... If the result is too large to be represented, the result is set to the largest representable number. ... Digital signal processing (DSP) is the study of signals in a digital representation and the processing methods of these signals. ...


Successor

Intel addressed the shortcomings of the MMX technology through SSE, a greatly expanded set of SIMD instructions with 32-bit floating point support and an additional set of 128-bit vector registers that made it easy to perform SIMD and FPU operations at the same time. SSE was in turn expanded with SSE2, which also extended MMX instructions so they can operate on 128-bit XMM registers (Later SSE extensions would still support operating integer data on MMX registers because the new SSE registers require OS support, until SSE4, which ended this support) and recently with SSSE3, introduced in the Intel Core microarchitecture. Support for any of these later instruction sets implies support for MMX. SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ... SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction, Multiple Data) instruction sets. ... Supplemental Streaming SIMD Extension 3 (SSSE3)[1] is Intels name for the SSE instruction sets fourth iteration, as they appear to consider it merely a revision of SSE3. ... The Intel Core microarchitecture (previously known as the Intel Next-Generation Micro-Architecture, or NGMA) is a multi-core processor microarchitecture unveiled by Intel in Q1 2006. ...


MMX in embedded applications

Intel's XScale processors starting with PXA270 include an extension to the ARM core called iwMMXt whose functions are similar to those of the IA-32 MMX extension. IwMMXt stands for "Intel® Wireless MMX™ Technology". It provides arithmetic and logic operations on 64-bit integer numbers (the software may choose to instead perform two 32-bit, four 16-bit or eight 8-bit operations in a single instruction). The extension contains 16 data registers of 64-bits and 8 control registers of 32-bits. All registers are accessed through standard ARM architecture coprocessor mapping mechanism. IwMMXt occupies coprocessors 0 and 1 space, and its opcodes coincide with the opcodes of an earlier floating-point extension, FPA. The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ... It has been suggested that this article or section be merged with X86 assembly language. ... The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ... Microprocessors perform operations using binary bits (on/off/1or0). ... FPA may refer to: Franklin Pierce Adams, U.S. newspaper columnist KELA (Kansaneläkelaitos in Finnish), also FPA (Folkpensionsanstalten in Swedish), the Finnish welfare agency Foreign Policy Association Function Point Analysis, a technique to estimate the time to be taken to complete a software project. ...


See also

AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple Computer, IBM and Motorola (the AIM alliance), and implemented on versions of the PowerPC including Motorolas G4 and IBMs G5 processors. ... PowerPC is a RISC microprocessor architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. Originally intended for personal computers, PowerPC CPUs have since become popular embedded and high-performance processors as well. ... PowerPC G4 is a designation used by Apple Computer to describe a fourth generation of PowerPC microprocessors. ... PowerPC 970FX Processor In computing, the PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit processors in the PowerPC family from IBM. The PowerPC 970 was introduced in 2002. ... The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ...

References

  1. ^ http://www.bdti.com/procsum/mmx_pent.htm
  2. ^ http://www.intel.com/design/intarch/mmx/mmx.htm
  3. ^ Controversy brews over use of MMX moniker - Intel's multimedia extension - Industry Trend or Event

External links


  Results from FactBites:
 
MMX - Wikipedia, the free encyclopedia (640 words)
MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors.
However, one of the main concepts of the MMX instruction set is the concept of packed data types, which means instead of using the whole register for a single 64-bit integer (quadword), two 32-bit integers (doubleword), four 16-bit integers (word) or eight 8-bit integers (byte) may be used.
MMX is rumoured to stand for MultiMedia, Multiple Math or Matrix Math eXtension, but officially it is a meaningless initialism trademarked by Intel.
  More results at FactBites »

 
 

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