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Encyclopedia > Interrupt handler

An interrupt handler, also known as an interrupt service routine, is a subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt. Interrupt handlers have a multitude of functions, which vary based on the reason the interrupt was generated and the speed at which the Interrupt Handler completes its task. In computer science, a subroutine (function, procedure, or subprogram) is a sequence of code which performs a specific task, as part of a larger program, and is grouped as one or more statement blocks; such code is sometimes collected into software libraries. ... An operating system is a program required for the user to manage the system and to run third-party application software for that system. ... A device driver, often called a driver for short, is a computer program that enables another program, typically an operating system (OS), to interact with a hardware device. ... In computer science, an interrupt is an asynchronous signal from hardware or software indicating the need for attention. ...


Overview

In modern systems interrupt handlers are split into two parts: the First-Level Interrupt Handler (FLIH) and the Second-Level Interrupt Handlers (SLIH).


The FLIH operates in the same way as the old interrupt routines did. In response to an interrupt there is a context switch and the code for the interrupt is loaded and executed. The job of the FLIH, however, is not to process the interrupt, but to schedule the execution of the SLIH, while recording any critical information which is only available at the time of the interrupt. These interrupt handlers have a short execution time which lowers the jitter in process execution. A context switch is the computing process of storing and restoring the state of a CPU (the context) such that multiple processes can share a single CPU resource. ... In the field of databases, a schedule is a list of actions, (i. ...


FLIH which service hardware typically mask their associated interrupt (or keep it masked as the case may be) until they complete their execution. Otherwise, these interrupt handlers might cause a stack overflow from multiple preemptions by the same interrupt vector. Pre-emption as used with respect to operating systems means the ability of the operating system to preempt or stop a currently scheduled task in favour of a higher priority task. ... Interrupt vector Computing term. ...


The SLIH sits on the run queue of the operating system until it can be executed to perform the processing for the interrupt when processor time is available. These interrupt handlers may have a long lived execution time, and thus may be scheduled similarly to threads and processes. In modern computers many processes run at once, to ensure each program has a fair share of resources each one is run for a period, when a program is taken out to let another run it is placed on the end of the run queue, and the programm at the...


It is worth noting that in many systems the FLIH and SLIH are referred to as upper halves and lower halves, hardware and software interrupts, or a derivation of those names.


See also


  Results from FactBites:
 
Interrupt handler - Wikipedia, the free encyclopedia (317 words)
An interrupt handler, also known as an interrupt service routine, is a subroutine in an operating system or device driver whose execution is triggered by the reception of an interrupt.
Interrupt handlers have a multitude of functions, which vary based on the reason the interrupt was generated and the speed at which the Interrupt Handler completes its task.
In response to an interrupt there is a context switch and the code for the interrupt is loaded and executed.
Interrupt - Wikipedia, the free encyclopedia (610 words)
Software interrupts are usually implemented as instructions in the instruction set, which cause a context switch to the interrupt handler similarly to a hardware interrupt.
Interrupts may be implemented in hardware as a distinct system with control lines, or they may be integrated into the memory subsystem.
In some cases, such as the x86 architecture, disabling and enabling interrupts on the processor itself acts as a memory barrier, in which case it may actually be slower.
  More results at FactBites »

 
 

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