The Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. It is the successor to the 486 line. The Pentium was originally to be named 80586 or i586, but the name was changed to Pentium because numbers could not be trademarked. i586 is however, used in programming referring to all the early Pentium processors, and Pentium-like processors made by the Intel competition.
Major changes from the 486:
- Superscalar architecture - The Pentium has two datapaths (pipelines) that allow it to complete more than one instruction per clock cycle. One pipe (called "U") can handle any instruction, while the other (called "V") can handle the simplest, most common instructions. The use of more than one pipeline is a characteristic typical of RISC processors designs, the first of many to be implemented on the x86 platform, thus signaling the road to take, and showing that it was possible to merge both technologies, creating almost “hybrid” processors.
- 64-bit data path - This doubles the amount of information pulled from the memory on each fetch. This doesn't mean that the Pentium can execute so-called 64-bit applications; its main registers are still 32-bit wide.
- MMX instructions (later models only) - A special instruction set designed for use in multimedia applications.
Pentium architecture chips offered just under twice the performance of a 486 processor per clock cycle. The fastest Intel 486 parts were almost the same speed as a first-generation Pentium, and a few late-model AMD 486 parts were roughly equal to the Pentium-75.
Pentium MMX - bottom view
The earliest Pentiums were released at the clock speeds of 66 MHz and 60 MHz. Later on 75, 90, 100, 120, 133, 150, 166, 200 and 233 MHz versions gradually became available. Pentium OverDrive processors were released at speeds of 63 and 83MHz as an upgrade option for older 486-class computers.
The original Pentium microprocessor had the internal code name P5, and was a pipelined in-order superscalar microprocessor, produced using a 0.8 µm process. It was followed by the P54, a shrink of the P5 to a 0.6 µm process, which was dual-processor ready and had an internal clock speed different than the front side bus (it's much more difficult to increase the bus speed than to increase the internal clock). In turn, the P54 was followed by the P54C, which used a 0.35 µm process - a pure CMOS process, as opposed to the Bipolar CMOS process that was used for the earlier Pentiums. Subsequently, the P55C was released as the Pentium with MMX Technology (usually just called Pentium MMX); it was based on the P5 core, the 0.35 µm process was also used for this series, but it had a new set of 57 "MMX" instructions to improve working on multimedia tasks, such as encoding and decoding. However, software must be specially optimized to make use of MMX, and the increased speed the P55C showed in its aparition was mainly due to the fact that the internal cache had been doubled in size: 32 KB.
The early versions of 60-100 MHz Pentiums had a problem in the floating point unit that, in rare cases, resulted in greatly reduced precision of division operations. This bug, discovered in 1994, became known as the Pentium FDIV bug and caused great embarrassment for Intel, which created an exchange program to replace the faulty processors with corrected ones. The 60 and 66 Mhz 0.8 µm versions of the Pentium processors were also known for their fragility and their (for the time) high levels of heat production.
Intel has retained the Pentium brand name for later generations of processor architectures, which are internally quite different from the Pentium itself:
It can be seen from this that brand name is only loosely related to the nature of a CPU's microarchitecture. The Pentium brand is now used for desktop parts, the Celeron brand is used for "value" parts (typically lower performance and lower price), and the Xeon brand is used for high-performance parts suitable for servers and power-users. The same basic microarchitecture may be used for all brands, but implementations may differ in clock speeds, cache sizes, and package and sockets. Moreover, the same name is used for chips with unrelated microarchitectures.