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Encyclopedia > Instruction set


An instruction set is [a list of] all the instructions, and all their variations, that a processor can execute. Image File history File links No higher resolution available. ... An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ...


Instructions include:

  • Arithmetic such as add and subtract
  • Logic instructions such as and, or, and not
  • Data instructions such as move, input, output, load, and store
  • Control flow instructions such as goto, if ... goto, call, and return.

An instruction set, or instruction set architecture (ISA), is the part of the computer architecture related to programming, including the native data types, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O. An ISA includes a specification of the set of opcodes (machine language), the native commands implemented by a particular CPU design. In computer science control flow (or alternatively, flow of control) refers to the order in which the individual statements, instructions or function calls of an imperative or functional program are executed or evaluated. ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... Computer programming (often simply programming) is the craft of implementing one or more interrelated abstract algorithms using a particular programming language to produce a concrete computer program. ... In programming languages a data type defines a set of values and the allowable operations on those values[1]. For example, in the Java programming language, the int type represents the set of 32-bit integers ranging in value from -2,147,483,648 to 2,147,483,647, and... In computer science, an instruction typically refers to a single operation of a processor within a computer architecture. ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... Addressing modes, a concept from computer science, are an aspect of the instruction set architecture in most central processing unit (CPU) designs. ... This article needs cleanup. ... In computing, an interrupt is an asynchronous signal from hardware or software indicating the need for attention. ... Exception handling is a programming language construct or computer hardware mechanism designed to handle the occurrence of some condition that changes the normal flow of execution. ... Energy Input: The energy placed into a reaction. ... Microprocessors perform operations using binary bits (on/off/1or0). ... A system of codes directly understandable by a computers CPU is termed this CPUs native or machine language. ... CPU design is the hardware design of a central processing unit. ...


Instruction set architecture is distinguished from the microarchitecture, which is the set of processor design techniques used to implement the instruction set. Computers with different microarchitectures can share a common instruction set. For example, the Intel Pentium and the AMD Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs. In computer engineering, microarchitecture (sometime abbreviated to µarch or uarch) is a description of the electrical circuitry of a computer, central processing unit, or digital signal processor that is sufficient for completely describing the operation of the hardware. ... In computer engineering, microarchitecture (sometime abbreviated to µarch or uarch) is a description of the electrical circuitry of a computer, central processing unit, or digital signal processor that is sufficient for completely describing the operation of the hardware. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... This article does not cite any references or sources. ... Advanced Micro Devices, Inc. ... Athlon is the brand name applied to a series of different x86 processors designed and manufactured by AMD. The original Athlon, or Athlon Classic, was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intels competing processors for a significant... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ...


This concept can be extended to unique ISAs like TIMI (Technology-Independent Machine Interface) present in the IBM System/38 and IBM AS/400. TIMI is an ISA that is implemented as low-level software and functionally resembles what is now referred to as a virtual machine. It was designed to increase the longevity of the platform and applications written for it, allowing the entire platform to be moved to very different hardware without having to modify any software except that which comprises TIMI itself. This allowed IBM to move the AS/400 platform from an older CISC architecture to the newer POWER architecture without having to recompile any parts of the OS or software associated with it. Nowadays there are several open source Operating Systems which could be easily ported on any existing general purpose CPU, because the compilation is the essential part of their design (e.g. new software installation). The IBM System/38 was a computer. ... i5 Model 570 (2006) The Application System/400 (also known as AS/400, iSeries (since 2000) and System i5 (since 2006)) is a type of minicomputer produced by IBM. It was first produced in 1988 and, as of 2006, is still in production. ... In computer science, a virtual machine is software that creates a virtualized environment between the computer platform and its operating system, so that the end user can operate software on an abstract machine. ... i5 Model 570 (2006) The Application System/400 (also known as AS/400, iSeries (since 2000) and System i5 (since 2006)) is a type of minicomputer produced by IBM. It was first produced in 1988 and, as of 2006, is still in production. ... A Complex Instruction Set Computer (CISC) is an instruction set architecture (ISA) in which each instruction can indicate several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... POWER is a RISC instruction set architecture designed by IBM. The name is a acronym for Performance Optimization With Enhanced RISC. POWER is also the name of a series of microprocessors that implements the instruction set architecture. ...

Contents

Machine language

Machine language is built up from discrete statements or instructions. Depending on the processing architecture, a given instruction may specify:

  • Particular registers for arithmetic, addressing, or control functions
  • Particular memory locations or offsets
  • Particular addressing modes used to interpret the operands

More complex operations are built up by combining these simple instructions, which (in a von Neumann machine) are executed sequentially, or as otherwise directed by control flow instructions. In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... Addressing modes, a concept from computer science, are an aspect of the instruction set architecture in most central processing unit (CPU) designs. ... The term Von Neumann machine has two seperate meanings. ... In computer science control flow (or alternatively, flow of control) refers to the order in which the individual statements, instructions or function calls of an imperative or functional program are executed or evaluated. ...


Some operations available in most instruction sets include:

  • moving
    • set a register (a temporary "scratchpad" location in the CPU itself) to a fixed constant value
    • move data from a memory location to a register, or vice versa. This is done to obtain the data to perform a computation on it later, or to store the result of a computation.
    • read and write data from hardware devices
  • computing
    • add, subtract, multiply, or divide the values of two registers, placing the result in a register
    • perform bitwise operations, taking the conjunction/disjunction (and/or) of corresponding bits in a pair of registers, or the negation (not) of each bit in a register
    • compare two values in registers (for example, to see if one is less, or if they are equal)
  • affecting program flow
    • jump to another location in the program and execute instructions there
    • jump to another location if a certain condition holds
    • jump to another location, but save the location of the next instruction as a point to return to (a call)

Some computers include "complex" instructions in their instruction set. A single "complex" instruction does something that may take many instructions on other computers. Such instructions are typified by instructions that take multiple steps, control multiple functional units, or otherwise appear on a larger scale than the bulk of simple instructions implemented by the given processor. Some examples of "complex" instructions include: In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... In computer programming, a bitwise operation operates on one or two bit patterns or binary numerals at the level of their individual bits. ... In computer science, a subroutine (function, method, procedure, or subprogram) is a portion of code within a larger program, which performs a specific task and can be relatively independent of the remaining code. ...

  • saving many registers on the stack at once
  • moving large blocks of memory
  • complex and/or floating-point arithmetic (sine, cosine, square root, etc.)
  • performing an atomic test-and-set instruction
  • instructions that combine ALU with an operand from memory rather than a register

A complex instruction type that has become particularly popular recently is the SIMD or Single-Instruction Stream Multiple-Data Stream operation or vector instruction, an operation that performs the same arithmetic operation on multiple pieces of data at the same time. SIMD have the ability of manipulating large vectors and matrices in minimal time. SIMD instructions allow easy parallelization of algorithms commonly involved in sound, image, and video processing. Various SIMD implementations have been brought to market under trade names such as MMX, 3DNow! and AltiVec. In mathematics, the trigonometric functions are functions of an angle, important when studying triangles and modeling periodic phenomena. ... In mathematics, the trigonometric functions are functions of an angle, important when studying triangles and modeling periodic phenomena. ... In mathematics, a square root (√) of a number x is a number r such that , or in words, a number r whose square (the result of multiplying the number by itself) is x. ... In computer science, the test-and-set instruction is an instruction used to atomically write to a memory location. ... -1... A vector processor, or array processor, is a CPU design that is able to run mathematical operations on a large number of data elements very quickly. ... Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ... The first 3DNow! CPU 3DNow! is the name of a multimedia extension created by AMD for its processors, starting with the K6-2 in 1998. ... AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple Computer, IBM and Motorola (the AIM alliance), and implemented on versions of the PowerPC including Motorolas G4 and IBMs G5 processors. ...


The design of instruction sets is a complex issue. There were two stages in history for the microprocessor. One using CISC or complex instruction set computer where many instructions were implemented. In the 1970s places like IBM did research and found that many instructions were used that could be eliminated. The result was the RISC, reduced instruction set computer, architecture which uses a smaller set of instructions. The result was a simpler instruction set may offer the potential for higher speeds, reduced processor size, and reduced power consumption; a more complex one may optimize common operations, improve memory/cache efficiency, or simplify programming. For other uses, see cache (disambiguation). ...


Instruction set design

When designing microarchitectures, engineers use blocks of "hard-wired" electronic circuitry (often designed separately) such as adders, multiplexers, counters, registers, ALUs etc. Some kind of register transfer language is then often used to describe the decoding and sequencing of each instruction of an ISA using this physical microarchitecture. There are two basic ways to implement this description (although many designs use middle ways or compromises): In computer science register transfer language (RTL) is a term used to describe a kind of intermediate representation (IR) that is very close to assembly language, such as that which is used in a compiler. ...

  1. Early computer designs and some of the simpler RISC computers "hard-wired" the complete instruction set decoding and sequencing (just like the rest of the microarchitecture).
  2. Other designs employ microcode routines and/or tables to do this—typically as on chip ROMs and/or PLAs (although separate RAMs have been used historically).

There are also some new CPU designs which compiles the instruction set to a writable RAM or FLASH inside the CPU (such as the Rekursiv processor and the Imsys Cjip)[1], or an FPGA (reconfigurable computing). The Western Digital MCP-1600 is an older example, using a dedicated, separate ROM for microcode. A microprogram is a program consisting of microcode that controls the different parts of a computers central processing unit (CPU). ... Look up RAM, Ram, ram in Wiktionary, the free dictionary. ... A USB flash drive. ... The Rekursiv computer was created by David Harland in the late 1980s for Linn Smart Computing in Glasgow, Scotland. ... Reconfigurable computing is computer processing with highly flexible computing fabrics. ... Western Digital Corporation (NYSE: WDC) (often abbreviated to WD) is a manufacturer of a large proportion of the worlds hard disks, and has a long history in the electronics industry as an IC maker and a storage products company. ... The MCP-1600 was a multi-chip microprocessor made by Western Digital in the late 1970s through the early 1980s. ...


An ISA can also be emulated in software by an interpreter. Naturally, due to the interpretation overhead, this is slower than directly running programs on the emulated hardware, unless the hardware running the emulator is an order of magnitude faster. Today, it is common practice for vendors of new ISAs or microarchitectures to make software emulators available to software developers before the hardware implementation is ready. This article is about emulation in computer science. ... In computer science, an interpreter is a computer program that executes, or performs, instructions written in a computer programming language. ...


Some instruction set designers reserve one or more opcodes for some kind of software interrupt. For example, MOS Technology 6502 uses 00H, Zilog Z80 uses the eight codes C7,CF,D7,DF,E7,EF,F7,FFH[1] while Motorola 68000 use codes in the range A000..AFFFH. In computer science, an interrupt is a signal from a device which typically results in a (register) context switch: that is, the processor sets aside what its doing and does something else. ... The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. ... One of the first Z80 microprocessors manufactured; the date stamp is from June 1976. ... The Motorola 68000 is a 16/32-Bit [1] CISC microprocessor core designed and marketed by Freescale Semiconductor (formerly Motorola Semiconductor Products Sector). ...


Fast virtual machines are much easier to implement if an instruction set meets the Popek and Goldberg virtualization requirements. The Popek and Goldberg virtualization requirements are a set of sufficient conditions for a computer architecture to efficiently support system virtualization. ...


On systems with multiple processors, non-blocking synchronization algorithms are much easier to implement if the instruction set includes support for something like "fetch-and-increment" or "load linked/store conditional (LL/SC)" or "atomic compare and swap". In computer science, non-blocking synchronization ensures that threads competing for a shared resource do not have their execution indefinitely postponed by mutual exclusion. ... In computer science, the compare-and-swap CPU instruction is a special instruction that atomically compares the contents of a memory location to a given value and, if they are the same, modifies the contents of that memory location to a given new value. ...


Code density

In early computers, program memory was expensive, so minimizing the size of a program to make sure it would fit in the limited memory was often central. Thus the combined size of all the instructions needed to perform a particular task, the code density, was an important characteristic of any instruction set. Computers with high code density also often had (and has) complex instructions for procedure entry, parameterized returns, loops etc (therefore retroactively named Complex Instruction Set Computers, CISC). However, more typical, or frequent, "CISC" instructions merely combine a basic ALU operation, such as "add", with the access of one or more operands in memory (using addressing modes such as direct, indirect, indexed etc). Certain architectures may allow two or three operands (including the result) directly in memory or may be able to perform functions such as automatic pointer increment etc. Software-implemented instruction sets may have even more complex and powerful instructions. A Complex Instruction Set Computer (CISC) is an instruction set architecture (ISA) in which each instruction can indicate several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ...


Reduced instruction-set computers, RISC, were first widely implemented during a period of rapidly-growing memory subsystems and sacrifice code density in order to simplify implementation circuitry and thereby try to increase performance via higher clock frequencies and more registers. RISC instructions typically perform only a single operation, such as an "add" of registers or a "load" from a memory location into a register; they also normally use a fixed instruction width, whereas a typical CISC instruction set has many instructions shorter than this fixed length. Fixed-width instructions are less complicated to handle than variable-width instructions for several reasons (not having to check whether an instruction straddles a cache line or virtual memory page boundary[2] for instance), and are therefore somewhat easier to optimize for speed. However, as RISC computers normally require more and often longer instructions to implement a given task, they inherently make less optimal use of bus bandwidth and cache memories. Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ...


Minimal instruction set computers (MISC) are a form of stack machine, where there are few separate instructions (16-64), so that multiple instructions can be fit into a single machine word. These type of cores often take little silicon to implement, so they can be easily realized in an FPGA or in a multi-core form. Code density is similar to RISC; the increased instruction density is offset by requiring more of the primitive instructions to do a task. MISC (Minimal Instruction Set Computer) is a processor architecture with a very small number of basic operations and corresponding opcodes. ... In computer science, a stack machine is a model of computation in which the computers memory takes the form of a stack. ... A field-programmable gate array or FPGA is a gate array that can be reprogrammed after it is manufactured, rather than having its programming fixed during the manufacturing — a programmable logic device. ... Diagram of a generic dual core processor, with CPU-local Level 1 caches, and a shared, on-die Level 2 cache. ...


There has been research into executable compression as a mechanism for improving code density. The mathematics of Kolmogorov complexity describes the challenges and limits of this. Executable compression is any means of compressing an executable file and combining the compressed data with the decompression code it needs into a single executable. ... In computer science, the Kolmogorov complexity (also known as descriptive complexity, Kolmogorov-Chaitin complexity, stochastic complexity, algorithmic entropy, or program-size complexity) of an object such as a piece of text is a measure of the computational resources needed to specify the object. ...


Number of operands

Instruction sets may be categorized by the number of operands (registers, memory locations, or immediate values) in their most complex instructions. This does not refer to the arity of the operators, but to the number of operands explicitly specified as part of the instruction. Thus, implicit operands stored in a special-purpose register or on top of the stack are not counted. In logic, mathematics, and computer science, the arity (synonyms include type, adicity, and rank) of a function or operation is the number of arguments or operands that the function takes. ... Look up Stack in Wiktionary, the free dictionary. ...


(In the examples that follow, a, b, and c refer to memory addresses, and reg1 and so on refer to machine registers.)

  • 0-operand ("zero address machines") -- these are also called stack machines, and all operations take place using the top one or two positions on the stack. Add two numbers in five instructions: #a, load, #b, load, add, #c, store;
  • 1-operand ("one address machines") -- often called accumulator machines -- include most early computers. Each instruction performs its operation using a single operand specifier. The single accumulator register is implicit -- source, destination, or often both -- in almost every instruction: load a, add b, store c;
  • 2-operand -- many RISC machines fall into this category, though many CISC machines also fall here as well. For a RISC machine (requiring explicit memory loads), the instructions would be: load a, reg1; load b, reg2; add reg1,reg2; store reg2,c;
  • 3-operand CISC -- some CISC machines fall into this category. The above example here might be performed in a single instruction in a machine with memory operands: add a, b,c, or more typically (most machines permit a maximum of two memory operations even in three-operand instructions): move a, reg1; add reg1,b, c;
  • 3-operand RISC -- most RISC machines fall into this category, because it allows "better reuse of data"[2]. In a typical three-operand RISC machines, all three operands must be registers, so explicit load/store instructions are needed. An instruction set with 32 registers requires 15 bits to encode three register operands, so this scheme is typically limited to instructions sets with 32-bit instructions or longer. Example: load a, reg1; load b, reg2; add reg1+reg2->reg3; store reg3,c;
  • more operands -- some CISC machines permit a variety of addressing modes that allow more than 3 operands (registers or memory accesses), such as the VAX "POLY" polynomial evaluation instruction.

In computer science, a stack machine is a model of computation in which the computers memory takes the form of a stack. ... This article is about a computer processor register. ... VAX is a 32-bit computing architecture that supports an orthogonal instruction set (machine language) and virtual addressing (i. ...

List of ISAs

This list is far from comprehensive as old architectures are abandoned and new ones invented on a continual basis. There are many commercially available microprocessors and microcontrollers implementing ISAs. Customised ISAs are also quite common in some applications, e.g. ARC International, application-specific integrated circuit, FPGA, and reconfigurable computing. Also see history of computing hardware. A microprocessor incorporates most or all of the functions of a central processing unit (CPU) on a single integrated circuit (IC). ... It has been suggested that this article or section be merged with embedded microprocessor. ... ARC International plc is a company that designs computer processors. ... This article does not cite any references or sources. ... A field-programmable gate array or FPGA is a gate array that can be reprogrammed after it is manufactured, rather than having its programming fixed during the manufacturing — a programmable logic device. ... Reconfigurable computing is computer processing with highly flexible computing fabrics. ... Computing hardware has been an important component of the process of calculation and computer data storage since it became useful for numerical values to be processed and shared. ...


ISAs implemented in hardware

DEC Alpha AXP 21064 Microprocessor die photo Package for DEC Alpha AXP 21064 Microprocessor Alpha AXP 21064 bare die mounted on a business card with some statistics The DEC Alpha, also known as the Alpha AXP, is a 64-bit RISC microprocessor originally developed and fabricated by Digital Equipment Corp... The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ... The Burroughs large systems were the largest of three series of Burroughs Corporation mainframe computers. ... In computing, IA-64 (short for Intel Architecture-64) is a 64-bit processor architecture developed cooperatively by Intel Corporation and Hewlett-Packard (HP), and implemented in the Itanium and Itanium 2 processors. ... 2007 Itanium logo Itanium is the brand name for 64-bit Intel microprocessors that implement the Intel Itanium architecture (formerly called IA-64). ... A MIPS R4400 microprocessor made by Toshiba. ... The Motorola 680x0, 0x0, m68k, or 68k family of CISC microprocessor CPU chips were 32-bit from the start, and were the primary competition for the Intel x86 family of chips. ... PA-RISC is a microprocessor architecture developed by Hewlett-Packards Systems & VLSI Technology Operation. ... The IBM 700/7000 series was a series of incompatible large scale (mainframe) computer systems made by IBM through the 1950s and early 1960s. ... System/360 Model 65 operators console, with register value lamps and toggle switches (middle of picture) and emergency pull switch (upper right). ... IBM logo The IBM System/370 (often: S/370) was a model range of IBM mainframes announced on June 30, 1970 as the successors to the System/360 family. ... The title given to this article is incorrect due to technical limitations. ... z/Architecture (formerly known as ESAME) refers to IBMs 64-bit computing architecture for its top-of-the-line enterprise servers. ... The Power Architecture logo Power Architecture is a broad term to describe similar instruction sets for RISC microprocessors developed and manufactured by such companies as IBM, Freescale, AMCC, Tundra and P.A. Semi. ... POWER is a RISC instruction set architecture designed by IBM. The name is a acronym for Performance Optimization With Enhanced RISC. POWER is also the name of a series of microprocessors that implements the instruction set architecture. ... PowerPC is a RISC microprocessor architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. Originally intended for personal computers, PowerPC CPUs have since become popular embedded and high-performance processors as well. ... The PDP-11 was a 16-bit minicomputer sold by Digital Equipment Corp. ... VAX is a 32-bit computing architecture that supports an orthogonal instruction set (machine language) and virtual addressing (i. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... The SuperHichem (or SH) is brandname of a certain microcontroller and microprocessor architecture. ... Multicore-processor TriCore is the name of a multicore-processor design by Infineon Technologies. ... The INMOS Transputer was a pioneering parallel computing microprocessor design of the 1980s from INMOS, a small English company. ... The UNIVAC 1100/2200 series is a series of compatible 36-bit computer systems, beginning with the UNIVAC 1107 in 1962, initially made by Sperry Rand. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... It has been suggested that this article or section be merged with X86 assembly language. ... The Intel 80386 is a microprocessor which was used as the central processing unit (CPU) of many personal computers from 1986 until 1994 and later. ... This article does not cite any references or sources. ... Athlon is the brand name applied to a series of different x86 processors designed and manufactured by AMD. The original Athlon, or Athlon Classic, was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intels competing processors for a significant... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... This article, image, template or category should belong in one or more categories. ...

ISAs commonly implemented in software with hardware incarnations

The UCSD p-System or UCSD Pascal System was a portable highly machine independent operating system developed in 1978 by the Institute for Information Systems of the University of California, San Diego to provide all students with a common operating system that could run on any of the then available... The UCSD p-System or UCSD Pascal System was a portable highly machine independent operating system developed in 1978 by the Institute for Information Systems of the University of California, San Diego to provide all students with a common operating system that could run on any of the then available... Western Digital Corporation (NYSE: WDC) (often abbreviated to WD) is a manufacturer of a large proportion of the worlds hard disks, and has a long history in the electronics industry as an IC maker and a storage products company. ... The Pascal MicroEngine was a series of products manufactured by Western Digital from 1979 thru the mid 1980s, designed specifically to efficiently run the UCSD p-System. ... A Java Virtual Machine (JVM) is a set of computer software programs and data structures which implements a specific virtual machine model. ... The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ... picoJava is a microprocessor specification dedicated to native execution of Java-based bytecode without the need for an interpreter or JIT compiler, thus speeding bytecode execution up to 20 times, compared to standard CPU. picoJava-based microprocessors can also execute legacy C/C++ code as efficiently as comparable RISC CPU... Wikipedia does not yet have an article with this exact name. ... Forth is a programming language and programming environment, initially developed by Charles H. Moore at the US National Radio Astronomy Observatory in the early 1970s. ...

ISAs never implemented in hardware

The SECD machine is a highly influential virtual machine intended as a target for functional programming language compilers. ... Functional programming is a programming paradigm that treats computation as the evaluation of mathematical functions and avoids state and mutable data. ... MMIX is a 64-bit RISC virtual machine designed by Donald Knuth, with significant contributions by John Hennessy (who designed the MIPS chip) and Dick Sites (who was the architect of the Alpha chip). ... Donald Ervin Knuth ( or Ka-NOOTH[1], Chinese: [2]) (b. ... Cover of books The Art of Computer Programming[1] is a comprehensive monograph written by Donald Knuth which covers many kinds of programming algorithms and their analysis. ... The Z machine at Sandia National Laboratory. ... Zork universe Zork games Zork Anthology Zork trilogy Zork I   Zork II   Zork III Beyond Zork   Zork Zero Enchanter trilogy Enchanter   Sorcerer   Spellbreaker Other games Wishbringer   Return to Zork Zork: Nemesis   Zork Grand Inquisitor Zork: The Undiscovered Underground Topics in Zork Encyclopedia Frobozzica Characters   Kings   Creatures Timeline   Magic   Calendar Zorkmid... Zork, an early work of interactive fiction, running on a modern interpreter Interactive fiction, often abbreviated as IF, is a simulated environment in which players use text commands to control characters. ...

See also

Categories of ISA

A Complex Instruction Set Computer (CISC) is an instruction set architecture (ISA) in which each instruction can indicate several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... A very long instruction word or VLIW CPU architectures implement a form of instruction level parallelism. ... MISC (Minimal Instruction Set Computer) is a processor architecture with a very small number of basic operations and corresponding opcodes. ... Explicitly Parallel Instruction Computing (EPIC) is a computing paradigm that began to be researched in the early 1980s resulting in a U.S. patent 4,847,755 (Gordon Morrison, et. ... Processor board of a CRAY YMP vector computer A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. ... -1... Flynns taxonomy is a classification of computer architectures, proposed by Michael J. Flynn in 1972. ... Orthogonal instruction set is a term used in computer science. ...

Applications where specialized instruction sets are used

A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ... GPU redirects here. ... Reconfigurable computing is computer processing with highly flexible computing fabrics. ...

Device types that implement some ISA

CPU redirects here. ... It has been suggested that this article or section be merged with embedded microprocessor. ... A microprocessor incorporates most or all of the functions of a central processing unit (CPU) on a single integrated circuit (IC). ...

Others


* Atmel AVR instruction set A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... CPU design is the hardware design of a central processing unit. ... This article is about emulators in computer science. ... A hardware abstraction layer (HAL) is an abstraction layer, implemented in software, between the physical hardware of a computer and the software that runs on that computer. ... In computer science register transfer language (RTL) is a term used to describe a kind of intermediate representation (IR) that is very close to assembly language, such as that which is used in a compiler. ... In computer science, a virtual machine is software that creates a virtualized environment between the computer platform and its operating system, so that the end user can operate software on an abstract machine. ... Here is the basic Atmel AVR instruction set. ...

SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ... SSE2, Streaming SIMD Extensions 2, is one of the IA-32 SIMD (Single Instruction, Multiple Data) instruction sets. ... -1... In computer software, an application binary interface (ABI) describes the low-level interface between an application program and the operating system, between an application and its libraries, or between component parts of the application. ...

References

  1. ^ Ganssle, Jack. "Proactive Debugging". Published February 26, 2001.
  2. ^ a b The evolution of RISC technology at IBM by John Cocke – IBM Journal of R&D, Volume 44, Numbers 1/2, p.48 (2000)

is the 57th day of the year in the Gregorian calendar. ... This article is about the year. ...

External links

CPU redirects here. ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... This article does not cite any references or sources. ... A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... Explicitly Parallel Instruction Computing (EPIC) is a computing paradigm that began to be researched in the early 1980s resulting in a U.S. patent 4,847,755 (Gordon Morrison, et. ... A Very Long Instruction Word or VLIW CPU architecture implements a form of instruction level parallelism. ... The One Instruction Set Computer is a single machine language opcode which is sufficient to produce a Turing complete machine. ... In computer science, ZISC stands for Zero Instruction Set Computer, which refers to a chip technology based on pure pattern matching and absence of (micro-)instructions in the classical sense. ... The term Harvard architecture originally referred to computer architectures that used physically separate storage and signal pathways for their instructions and data (in contrast to the von Neumann architecture). ... Design of the Von Neumann architecture For the robotic architecture also named after Von Neumann, see Von Neumann machine The von Neumann architecture is a computer design model that uses a single storage structure to hold both instructions and data. ... Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ... Basic five-stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back) An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput (the number of instructions that... Simple superscalar pipeline. ... In computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ... In computer engineering, register renaming refers to a technique used to avoid unnecessary serialization of program operations imposed by the reuse of registers by those operations. ... In computer science, speculative execution is the execution of code whose result may not actually be needed. ... Multithreading computers have hardware support to efficiently execute multiple threads. ... Multiprocessing is traditionally known as the use of multiple concurrent processes in a system as opposed to a single process at any one instant. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ... A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ... Processor board of a CRAY YMP vector computer A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. ... -1... 32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32-bit chunks. ... In computing, a 64-bit component is one in which data are processed or stored in 64-bit units (words). ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... This article does not cite any references or sources. ... An Altera Stratix II GX FPGA. A field-programmable gate array is a semiconductor device containing programmable logic components called logic blocks, and programmable interconnects. ... A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ... It has been suggested that this article or section be merged with embedded microprocessor. ... Application Specific Instruction-Set Processor or (ASIP) is a methodology used in System-on-a-Chip design. ... System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. ... Power management is a feature of some electrical appliances, especially copiers and computer peripherals such as monitors and printers, that turns off the power or switches the system to a low-power state after a period of inactivity. ... For the computer architecture technique to increase processor performance by increasing clock frequency, see frequency scaling. ... Dynamic voltage scaling is a technique in computer architecture where a processor is run at a less-than-maximum voltage in order to conserve power. ... Clock gating is one of the power-saving techniques used on the Pentium 4 processor. ...

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The ARM Instruction Set Architecture (1217 words)
The ARMv4T architecture added the 16-bit Thumb® instruction set which enabled compilers to generate more compact code (memory savings of up to 35% over the equivalent 32-bit code), while retaining all the benefits of a 32-bit system.
The Thumb changes added a few new instructions along with improvements to Thumb/ARM interworking, greatly improving compiler capabilities and the ability to mix and match ARM versus Thumb routines to balance code size and performance.
The ‘E’ instruction set extensions were designed to provide a DSP capability in a general purpose CPU, resulting in improved performance and flexibility.
PA-RISC 2.0 instruction set architecture (HTML) (150 words)
All of HP PA-RISC 2.0 instruction set architecture (HTML)
j - pa-risc 2 instruction completers and pseudo-ops
The information contained in this document is subject to change without notice.
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