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A floating point unit (FPU) is a part of a CPU specially designed to carry out operations on floating point numbers. Typical operations are floating point arithmetic (such as addition and multiplication), but some systems may be capable of performing exponential or trigonometric calculations as well (such as square roots or cosines).

Not all CPUs have a dedicated FPU. In the absence of an FPU, the CPU may use a microcode program to emulate an FPUs function using an arithmetic and logical unit (ALU), which saves the added hardware cost of an FPU but is significantly slower.

In some computer architectures, floating point operations are handled completely separate from integer operations, with dedicated floating point registers and independent clocking schemes. Floating point addition and multiplication operations are typically pipelined, but more complicated operations, like division, may not be, and some systems may even have a dedicated floating point divider circuit.

Until the mid 1990s, it was common for the FPU to be entirely separate from the CPU in home computers and for it to be an optional item. It would only be purchased if needed to speed up or enable math-intensive programs. Examples include the 387 and 487 FPUs, for use with 386 and 486 CPUs, and the 68881 FPU, used with the 680x0 line, commonly found in Macintosh computers. Since then, the FPU has generally been included as part of the processor.

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 FpU - Hovedside (151 words) Giskes forslag er formyndersk og idiotisk, uttaler 1.nestformann i FpU, Ove A. Vanebo. Venstre i Danmark ble historiske da statsminister Anders Fogh Rasmussen ble gjenvalgt for tredje gang. Formann i FpU, Trond Birkedal jublet da det ble klart at Venstre for tredje gang på rad sikret styringsflertallet.
 Simply FPU Chap.1 (2750 words) If the FPU would be instructed to load another value while the first one is still in BC7, it would again turn the barrel clockwise by one notch and load the specified value again in the top compartment, which would now be BC6. If the FPU handles this exception (when the UM bit is set in the Control Word), it would denormalize the value until the exponent is in range or ultimately return a 0. If the FPU handles this exception (when the ZM bit is set in the Control Word), it would generate a properly signed INFINITY according to the XOR of the operand signs and then according to the IC flag of the Control Word.
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