A field-programmable gate array or FPGA is a gate array that can be reprogrammed after it is manufactured, rather than having its programming fixed during the manufacturing — a programmable logic device.
FPGAs are generally slower than their ASIC counterparts, and draw more power. However, they have several advantages such as a shorter time-to-market, and lower development costs (for quantities < 10k). An ASIC can be made that is a so-called hard copy of an FPGA - that is, an integrated circuit with the same functionality as the FPGA, but faster and consuming less power.
Many modern FPGAs have the ability to be reprogrammed at 'run time', and this is leading to the idea of reconfigurable computing or reconfigurable systems - CPUs that reconfigure themselves to suit the task at hand. Software-configurable microprocessors such as Stretch (http://www.stretchinc.com/)'s S5000 adopt a hybrid approach by providing a processor core and an FPGA core on the same chip.
FPGA processors change the view on algorithmic problem solving and have the advantage of being extremely powerful for many applications.
Widely used computer architectures have a fixed central processing unit (CPU) operating on data stored in a memory. Programs determine the sequence of single instructions executed by the CPU. This is a disadvantage for algorithms which can be executed in parallel.
In contrast FPGA computers have no given processor structure but offer large amounts of logic gates, registers, RAM and routing resources. These can be used for performing logical and arithmetical operations, for variable storage and to transfer data between different parts of the system. Programs do not determine the sequence of execution but the logical structure of the reconfigurable machine. Therefore algorithms are not only executable in parallel but are executed using a minimum amount of hardware. A single bit operation for instance is mapped on a single logic block of an FPGA (typically less than 0.01% of the machine size for currently existing architectures) instead of using about 3% of a complete 32bit ALU like in a general purpose processor. No register-register transfers are needed to bring operands to the logical element or store the result. Typically thousands of operations can be performed in parallel on an FPGA computer during every clock cycle. Though the clock speed of FPGAs (20-80MHz) is lower than of current RISC systems (100-500MHz) the resulting speedup can be extremely high: in many applications like image processing, artificial neural networks, data encryption or string processing, speedups between 100 and 1000 have been reported. For some High Energy Physics trigger applications Enable++ outperforms high end RISCs workstations by a factor around 1000.
Applications of FPGAs include DSP, Software-defined radio, Aerospace and defense systems, ASIC Prototyping, Medical imaging, Computer vision, Speech recognition, Cryptography, Bioinformatics, and a growing range of other areas.
A basic FPGA is made up of two types of blocks: Look-up tables (LUTs), and routing. More complicated FPGAs may also include blocks of dedicated RAM and some common logical blocks such as multipliers or adders.
A look-up table acts as a gate that can be programmed with any logic function. The LUT is usually implemented as a storage block with a one-bit word. To program the LUT, the truth table of the gate being implemented by the LUT is loaded into the storage block. The input to the truth table corresponds to the address lines of the storage element, and the output of the truth table is the stored value at that address. The storage element may be directly connected to the output, or a flip-flop may be inserted between the gate and the output for clocked logic.
The inputs and outputs to the various LUTs are connected to each other by one or more routing block. Each routing block has several wires connected to it, and these wires have programmable connections between them. Since the total number of possible connections increases so quickly with the number of wires connected to the routing block, most routing blocks are designed so that only certain paths through the block are possible.
The LUTs and routing blocks are usually distributed evenly throughout the FPGA, giving it a regular array structure.
FPGA Design and programing
To define the behaviour of the FPGA it is required to use a Hardware Description Language (HDL) or a schematic designed using an Electronic design automation tool. Either of these, when compiled, will generate a net list, that can be mapped to the actual fpga architecture. When done the binary file generated is used to (re)configure the FPGA device. Common HDL's are VHDL and Verilog.
To simplify the design there exist libraries of predefined complex functions and circuits, which have been tested and optimized to speed up the design process.
Basic process technology types
- SRAM - based on static memory technology. In-system programmable and re-programmable. Requires external boot devices. Usually CMOS.
- Anti-fuse - One-time programmable. CMOS.
- EPROM - Electrically Programmable Read-Only Memory technology. Usually one-time programmable in production because of plastic packaging. Windowed devices can be erased with ultraviolet (UV) light. CMOS.
- EEPROM - Electrically Eraseable Programmable Read-Only Memory technology. Can be erased, even in plastic packages. Some, but not all, EEPROM devices can be in-system programmed. CMOS.
- FLASH - Flash-erase EPROM technology. Can be erased, even in plastic packages. Some, but not all, FLASH devices can be in-system programmed. Usually, a FLASH cell is smaller than an equivalent EEPROM cell and is therefore less expensive to manufacture. CMOS.
- Fuse - One-time programmable. Bipolar.
Device manufacturers include Xilinx, Altera, Lattice Semiconductor, Actel, Cypress, Atmel and QuickLogic.
- comp.arch.fpga (http://groups.google.com/groups?hl=fr&lr=&group=comp.arch.fpga) Google archive of Usenet groups, where people interested in FPGA hang.
- GOSPL (http://www.gospl.org/fpl/static/aboutgospl.jsp) an open source tool for developing FPGA
- Opencores (http://www.opencores.org) a set of free IP cores that can be implemented in FPGAs
- a good FPGA tools overview (http://www.rtcmagazine.com/home/article.php?id=100125)
- FPGAworld news, jobs, forums, demos etc. (http://www.fpgaworld.com)
- FPGA Basics by Ray Andraka (http://andraka.com/whatisan.htm)
- Fpga4Fun various fpga projects (http://www.fpga4fun.com)
- FPGA Boards (http://www.fpga-faq.com/FPGA_Boards.shtml)
- FPGA manufacturors
- Xilinx (http://www.xilinx.com/) Xilinx has traditionally been the FPGA leader, Xilinx general philosophy is to provide all the features possible, at the cost of extra complexity.
- Altera (http://www.altera.com/) Altera is the second FPGA heavyweight it's philosophy is to provide the features that most people want while keeping their devices easy to use.
- Lattice (http://www.latticesemi.com/) better known for its CPLDs, have also an "instant-on" FPGA family.
- Actel (http://www.actel.com/) and QuickLogic (http://www.quicklogic.com/) have antifuse (programmable-only-once) products.
- Cypress (http://www.cypress.com/cypress/prodgate/prog.html)
- Atmel (http://www.atmel.com/)
- Debian FPGA (http://wiki.debian.net/?FPGA).
Note: FPGA's should not be confused with Flip-chip pin grid array, a form of integrated circuit packaging.