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Encyclopedia > Direct memory access

Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. Many hardware systems use DMA including disk drive controllers, graphics cards, network cards, and sound cards. Computers that have DMA channels can transfer data to and from devices with much less CPU overhead than computers without a DMA channel. This article is about the machine. ... This article does not cite any references or sources. ... CPU redirects here. ... Disk Drive is the afternoon show on CBC Radio Two. ... A graphics/video/display card/board/adapter is a computer component designed to convert the logical representation of visual information into a signal that can be used as input for a display medium. ... A network card, network adapter or NIC (network interface controller) is a piece of computer hardware designed to allow computers to communicate over a computer network. ... A sound card (also known as an audio card) is a computer expansion card that can input and output sound under control of computer programs. ... CPU redirects here. ...


Without DMA, using programmed input/output (PIO) mode, the CPU typically has to be occupied for the entire time it's performing a transfer. With DMA, the CPU would initiate the transfer, do other operations while the transfer is in progress, and receive an interrupt from the DMA controller once the operation has been done. This is especially useful in real-time computing applications where not stalling behind concurrent operations is critical. The programmed input/output (PIO) interface was the original method used to transfer data between the CPU (through the ATA controller) and an ATA device. ... Realtime redirects here. ...

Contents

Principle

DMA is an essential feature of all modern computers, as it allows devices to transfer data without subjecting the CPU to a heavy overhead. Otherwise, the CPU would have to copy each piece of data from the source to the destination. This is typically slower than copying normal blocks of memory since access to I/O devices over a peripheral bus is generally slower than normal system RAM. During this time the CPU would be unavailable for any other tasks involving CPU bus access, although it could continue doing any work which did not require bus access.


A DMA transfer essentially copies a block of memory from one device to another. While the CPU initiates the transfer, it does not execute it. For so-called "third party" DMA, as is normally used with the ISA bus, the transfer is performed by a DMA controller which is typically part of the motherboard chipset. More advanced bus designs such as PCI typically use bus mastering DMA, where the device takes control of the bus and performs the transfer itself. This article does not cite any references or sources. ... 64-bit PCI expansion slots inside a Power Macintosh G4 The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI), specifies a computer bus for attaching peripheral devices to a computer motherboard. ... This article does not cite any references or sources. ...


A typical usage of DMA is copying a block of memory from system RAM to or from a buffer on the device. Such an operation does not stall the processor, which as a result can be scheduled to perform other tasks. DMA transfers are essential to high performance embedded systems. It is also essential in providing so-called zero-copy implementations of peripheral device drivers as well as functionalities such as network packet routing, audio playback and streaming video. A stall is the slowing or stopping of a process. ... A router, an example of an embedded system. ... Zero-copy is an adjective that qualifies computer operations in which the CPU does not perform the task of copying data from one area of memory to another. ... A device driver, or software driver is a computer program allowing higher-level computer programs to interact with a computer hardware device. ... Streaming media is just-in-time delivery of multimedia information. ...


Cache coherency problem

DMA can lead to cache coherency problems. Imagine a CPU equipped with a cache and an external memory, which can be accessed directly by devices using DMA. When the CPU accesses location X in the memory, the current value will be stored in the cache. Subsequent operations on X will update the cached copy of X, but not the external memory version of X. If the cache is not flushed to the memory before the next time a device tries to access X, the device will receive a stale value of X. Cache coherence refers to the integrity of data stored in local caches of a shared resource. ...


Similarly, if the cached copy of X is not invalidated when a device writes a new value to the memory, then the CPU will operate on a stale value of X.


Image File history File links No higher resolution available. ...


DMA engines

In addition to hardware interaction, DMA can also be used to offload expensive memory operations, such as large copies or scatter-gather operations, from the CPU to a dedicated DMA engine. While normal memory copies are typically too small to be worthwhile to offload on today's desktop computers, they are frequently offloaded on embedded devices due to more limited resources.[1] Vectored I/O, also known as scatter/gather I/O, is method of input and output by which a single procedure call sequentially writes data from, or reads data into, a vector of buffers, to or from, respectively, a data stream. ... An embedded system is a special-purpose computer system, which is completely encapsulated by the device it controls. ...


Newer Intel Xeon processors also include a DMA engine technology called I/OAT, meant to improve network performance on high-throughput network interfaces, in particular gigabit Ethernet and faster.[2] However, various benchmarks with this approach by Intel's Linux kernel developer Andrew Grover indicate no more than 10% improvement in CPU utilization with receiving workloads, and no improvement when transmitting data.[3] This article is about the Intel microprocessor. ... Gigabit Ethernet (GbE or 1 GigE) is a term describing various technologies for transmitting Ethernet frames at a rate of a gigabit per second, as defined by the IEEE 802. ... The Linux kernel is a Unix-like operating system kernel. ...


Reconfigurable DMA circuits, for instance, based on GAG Generic Address Generators, provide the enabling technology of Auto-sequencing memory, programmable by Flowware to generate the data streams for running system architectures based on the anti machine paradigm, which could be called a DMA engine. Reconfigurable computing is computer processing with highly flexible computing fabrics. ... The Generic Address Generator (GAG) is a generalization of the DMA (Direct Memory Access) method for the transfer of blocks of data or of data streams between memory and processing resource without the need to individually address each data item by a CPU instruction. ... An Auto-sequencing memory (ASM) block is a RAM memory unit including an address generator with a data counter (a data pointer) used as a data address register for implementation of a data stream. ... Flowware is the second program source needed for morphware in Reconfigurable Computing, i. ... In computer science the Anti machine, the basic machine paradigm for Reconfigurable Computing (for more details see Xputer), is the counterpart of the von Neumann machine. ...


Examples

ISA

For example, a PC's ISA DMA controller has 16 DMA channels of which 7 are available for use by the PC's CPU. Each DMA channel has associated with it a 16-bit address register and a 16-bit count register. To initiate a data transfer the device driver sets up the DMA channel's address and count registers together with the direction of the data transfer, read or write. It then instructs the DMA hardware to begin the transfer. When the transfer is complete, the device interrupts the CPU. A personal computer (PC) is a computer whose price, size, and capabilities make it useful for individuals. ... This article does not cite any references or sources. ...


Scatter-gather DMA allows the transfer of data to and from multiple memory areas in a single DMA transaction. It is equivalent to the chaining together of multiple simple DMA requests. Again, the motivation is to off-load multiple input/output interrupt and data copy tasks from the CPU. Energy Input: The energy placed into a reaction. ...


DRQ stands for DMA request; DACK for DMA acknowledge. These symbols are generally seen on hardware schematics of computer systems with DMA functionality. They represent electronic signaling lines between the CPU and DMA controller. A schematic of the Washington Metro. ...


PCI

As mentioned above, a PCI architecture has no central DMA controller, unlike ISA. Instead, any PCI component can request control of the bus ("become the bus master") and request to read and write from the system memory. More precisely, a PCI component requests bus ownership from the PCI bus controller (usually the southbridge in a modern PC design), which will arbitrate if several devices request bus ownership simultaneously, since there can only be one bus master at one time. When the component is granted ownership, it will issue normal read and write commands on the PCI bus, which will be claimed by the bus controller and forwarded to the memory controller using a scheme which is specific to every chipset. 64-bit PCI expansion slots inside a Power Macintosh G4 The Peripheral Component Interconnect, or PCI Standard (in practice almost always shortened to PCI), specifies a computer bus for attaching peripheral devices to a computer motherboard. ... bus master ... This article does not cite any references or sources. ... Arbiters are used in asynchronous circuits to order computational activities for shared resources to preventing concurrent incorrect operations. ...


As an example, on a modern AMD Socket AM2-based PC, the southbridge will forward the transactions to the northbridge (which is integrated on the CPU die) using HyperTransport, which will in turn convert them to DDR2 operations and send them out on the DDR2 memory bus. As can be seen, there are quite a number of steps involved in a PCI DMA transfer; however, that poses little problem, since the PCI device or PCI bus itself are an order of magnitude slower than rest of components (see list of device bandwidths). Advanced Micro Devices, Inc. ... The Socket AM2, renamed from Socket M2 (to prevent using the same name as Cyrix MII processors), is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments. ... This article or section does not cite any references or sources. ... HyperTransport logo HyperTransport (HT), formerly known as Lightning Data Transport (LDT), is a bidirectional serial/parallel high-bandwidth, low-latency point to point link that was introduced on April 2, 2001. ... This is a list of device bandwidths: the channel capacity (or, more informally, bandwidth) of some computer devices employing methods of data transport is listed by bit/s, kilobit/s (kbit/s), megabit/s (Mbit/s), or gigabit/s (Gbit/s) as appropriate and also MB/s or megabytes per...


A modern x86 CPU may use more than 4 GiB of memory, utilizing PAE, a 64-bit addressing mode. In such case, a device using DMA with 32-bit address bus is unable to address the memory above 4 GiB line. In computing, Physical Address Extension (PAE) refers to a feature of x86 processors that allows for up to 64 gigabytes of physical memory to be used in 32-bit systems, given appropriate operating system support. ...


AHB

In systems-on-a-chip and embedded systems, typical system bus infrastructure is a complex on-chip bus such as AMBA AHB. AMBA defines two kinds of AHB components: master and slave. A slave interface is similar to programmed I/O through which the software (running on embedded CPU, e.g. ARM) can write/read I/O registers or (less commonly) local memory blocks inside the device. A master interface can be used by the device to perform DMA transactions to/from system memory without heavily loading the CPU. System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. ... A router, an example of an embedded system. ... AHB (Advanced High-performance Bus) is a bus protocol introduced in AMBA Specification version 2 published by ARM Ltd company. ... Look up ARM in Wiktionary, the free dictionary. ...


Therefore high bandwidth devices such as network controllers that need to transfer huge amounts of data to/from system memory will have two interface adapters to the AHB bus: a master and a slave interface. This is because on-chip buses like AHB do not support tri-stating the bus or alternating the direction of any line on the bus. Like PCI, no central DMA controller is required since the DMA is bus-mastering, but an arbiter is required in case of multiple masters present on the system. In electronics a three-state, tri-state or 3-state digital logic gate is one in which the output circuit can be disconnected from the rest of the circuit, putting the output in a high impedance state. ... Arbiters are used in asynchronous circuits to order computational activities for shared resources to preventing concurrent incorrect operations. ...


Internally, a multichannel DMA engine is usually present in the device to perform multiple concurrent scatter-gather operations as programmed by the software. Vectored I/O, also known as scatter/gather I/O, is method of input and output by which a single procedure call sequentially writes data from, or reads data into, a vector of buffers, to or from, respectively, a data stream. ...


See also

Remote Direct Memory Access (RDMA) is a concept whereby two or more computers communicate via Direct Memory Access directly from the main memory of one system to the main memory of another. ... A Blitter (acronym for BLock Image TransferrER) is a chip that specialises in bitmap data-transfer using bit blit methods. ... ATA connector on the left, with two motherboard ATA connectors on the right. ...

References

  1. ^ Ganssle, Jack (1994-10). "Memory copies in hardware". Embedded Systems Programming. Retrieved on 2006-11-12. 
  2. ^ Corbet, Jonathan (2005-12-06). "Memory copies in hardware". LWN.net (December 8, 2005). Retrieved on 2006-11-12. 
  3. ^ Grover, Andrew (2006-06-01). I/OAT on LinuxNet wiki. Overview of I/OAT on Linux, with links to several benchmarks. Retrieved on 2006-12-12.
  • mmap() and DMA, from Linux Device Drivers, 2nd Edition, Alessandro Rubini & Jonathan Corbet
  • Memory Mapping and DMA, from Linux Device Drivers, 3rd Edition, Jonathan Corbet, Alessandro Rubini, Greg Kroah-Hartman
  • DMA and Interrupt Handling
  • DMA Modes & Bus Mastering

  Results from FactBites:
 
Direct memory access - Encyclopedia, History, Geography and Biography (582 words)
Direct memory access (DMA) allows certain hardware subsystems within a computer to access system memory for reading and/or writing independently of the CPU.
DMA is an essential feature of all modern computers, as it allows devices to transfer data without subjecting the CPU to a heavy overhead.
For so-called "third party" DMA, as is normally used with the ISA bus, the transfer is performed by a DMA controller which is typically part of the motherboard chipset.
Direct memory access control apparatus - Patent 4455620 (6311 words)
Upon receipt of a direct memory access request from the high speed input/output device 40, the central processing unit is placed in a floating state, in which it is not capable of communication with the memory.
The direct memory access controller 303 causes a high GRANT signal to be generated by the switch control circuit 405 in the same manner as the operation in the previously described READ state, whereby a low DGRNT signal is generated from the switch control circuit 405.
However, the direct memory access controller 303 is responsive to a fall of the clock pulse to check the direct memory access request signal DRQ from the second byte to the final byte.
  More results at FactBites »

 
 

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