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Encyclopedia > Central processing unit
Die of an Intel 80486DX2 microprocessor (actual size: 12×6.75 mm) in its packaging

A Central Processing Unit (CPU), or sometimes just called processor, is a description of a class of logic machines that can execute computer programs. This broad definition can easily be applied to many early computers that existed long before the term "CPU" ever came into widespread usage. The term itself and its initialism have been in use in the computer industry at least since the early 1960s (Weik 1961). The form, design and implementation of CPUs have changed dramatically since the earliest examples, but their fundamental operation has remained much the same. CPU can stand for: in computing: central processing unit in journalism: Commonwealth Press Union in law enforcement: Crime prevention unit in software: Critical patch update, a type of software patch distributed by Oracle Corporation in the postal system: a Contract Postal Unit, esp. ... Image File history File links Download high resolution version (1341x1002, 803 KB) Summary Macro shot of an Intel 80486DX2 die in its packaging. ... Image File history File links Download high resolution version (1341x1002, 803 KB) Summary Macro shot of an Intel 80486DX2 die in its packaging. ... A die in the context of integrated circuits is a small piece of semiconducting material on which a given circuit is fabricated. ... An Intel i486DX2-66 Microprocessor, top view ... and bottom view with gold plated pins. ... A computer program is a collection of instructions that describe a task, or set of tasks, to be carried out by a computer. ...


Early CPUs were custom-designed as a part of a larger, usually one-of-a-kind, computer. However, this costly method of designing custom CPUs for a particular application has largely given way to the development of mass-produced processors that are suited for one or many purposes. This standardization trend generally began in the era of discrete transistor mainframes and minicomputers and has rapidly accelerated with the popularization of the integrated circuit (IC). The IC has allowed increasingly complex CPUs to be designed and manufactured in very small spaces (on the order of millimeters). Both the miniaturization and standardization of CPUs have increased the presence of these digital devices in modern life far beyond the limited application of dedicated computing machines. Modern microprocessors appear in everything from automobiles to cell phones to children's toys. Assorted discrete transistors A transistor is a semiconductor device, commonly used as an amplifier or an electrically controlled switch. ... For other uses, see Mainframe. ... Minicomputer (colloquially, mini) is a largely obsolete term for a class of multi-user computers which make up the middle range of the computing spectrum, in between the largest multi-user systems (traditionally, mainframe computers) and the smallest single-user systems (microcomputers or personal computers). ... Integrated circuit of Atmel Diopsis 740 System on Chip showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window, showing the integrated circuit inside. ... A millimetre (American spelling: millimeter), symbol mm is an SI unit of length that is equal to one thousandth of a metre. ... Car redirects here. ... Motorola T2288 mobile phone A mobile phone is a portable electronic device which behaves as a normal telephone whilst being able to move over a wide area (compare cordless phone which acts as a telephone only within a limited range). ...

Contents

History of CPUs

EDVAC, one of the first electronic stored program computers.

Prior to the advent of machines that resemble today's CPUs, computers such as the ENIAC had to be physically rewired in order to perform different tasks. These machines are often referred to as "fixed-program computers," since they had to be physically reconfigured in order to run a different program. Since the term "CPU" is generally defined as a software (computer program) execution device, the earliest devices that could rightly be called CPUs came with the advent of the stored-program computer. // Each of the computer designs of the early 1950s was a unique design; there were no upward-compatible machines or computer architectures with multiple, differing implementations. ... EDVAC U.S. Army Photo http://ftp. ... EDVAC U.S. Army Photo http://ftp. ... The EDVAC as installed in Building 328 at the Ballistics Research Laboratory. ... ENIAC ENIAC, short for Electronic Numerical Integrator And Computer,[1] was the first large-scale, electronic, digital computer capable of being reprogrammed to solve a full range of computing problems,[2] although earlier computers had been built with some of these properties. ...


The idea of a stored-program computer was already present during ENIAC's design, but was initially omitted so the machine could be finished sooner. On June 30, 1945, before ENIAC was even completed, mathematician John von Neumann distributed the paper entitled "First Draft of a Report on the EDVAC." It outlined the design of a stored-program computer that would eventually be completed in August 1949 (von Neumann 1945). EDVAC was designed to perform a certain number of instructions (or operations) of various types. These instructions could be combined to create useful programs for the EDVAC to run. Significantly, the programs written for EDVAC were stored in high-speed computer memory rather than specified by the physical wiring of the computer. This overcame a severe limitation of ENIAC, which was the large amount of time and effort it took to reconfigure the computer to perform a new task. With von Neumann's design, the program, or software, that EDVAC ran could be changed simply by changing the contents of the computer's memory.[1] For other persons named John Neumann, see John Neumann (disambiguation). ... The First Draft of a Report on the EDVAC (or First Draft) was an incomplete 101-page document written by John von Neumann and distributed on June 30, 1945 by Herman Goldstine, security officer on the classified ENIAC project. ... To meet Wikipedias quality standards, this article or section may require cleanup. ...


While von Neumann is most often credited with the design of the stored-program computer because of his design of EDVAC, others before him such as Konrad Zuse had suggested similar ideas. Additionally, the so-called Harvard architecture of the Harvard Mark I, which was completed before EDVAC, also utilized a stored-program design using punched paper tape rather than electronic memory. The key difference between the von Neumann and Harvard architectures is that the latter separates the storage and treatment of CPU instructions and data, while the former uses the same memory space for both. Most modern CPUs are primarily von Neumann in design, but elements of the Harvard architecture are commonly seen as well. Statue in Bad Hersfeld Konrad Zuse (June 22, 1910 Berlin - December 18, 1995 Hünfeld) was a German engineer and computer pioneer. ... The term Harvard architecture originally referred to computer architectures that used physically separate storage and signal pathways for their instructions and data (in contrast to the von Neumann architecture). ... Portion of the Harvard-IBM Mark 1, left side. ... A roll of punched tape Punched tape is an old-fashioned form of data storage, consisting of a long strip of paper in which holes are punched to store data. ...


Being digital devices, all CPUs deal with discrete states and therefore require some kind of switching elements to differentiate between and change these states. Prior to commercial acceptance of the transistor, electrical relays and vacuum tubes (thermionic valves) were commonly used as switching elements. Although these had distinct speed advantages over earlier, purely mechanical designs, they were unreliable for various reasons. For example, building direct current sequential logic circuits out of relays requires additional hardware to cope with the problem of contact bounce. While vacuum tubes do not suffer from contact bounce, they must heat up before becoming fully operational and eventually stop functioning altogether.[2] Usually, when a tube failed, the CPU would have to be diagnosed to locate the failing component so it could be replaced. Therefore, early electronic (vacuum tube based) computers were generally faster but less reliable than electromechanical (relay based) computers. Tube computers like EDVAC tended to average eight hours between failures, whereas relay computers like the (slower, but earlier) Harvard Mark I failed very rarely (Weik 1961:238). In the end, tube based CPUs became dominant because the significant speed advantages afforded generally outweighed the reliability problems. Most of these early synchronous CPUs ran at low clock rates compared to modern microelectronic designs (see below for a discussion of clock rate). Clock signal frequencies ranging from 100 kHz to 4 MHz were very common at this time, limited largely by the speed of the switching devices they were built with. For other uses, see Digital (disambiguation). ... Automotive style miniature relay A relay is an electrical switch that opens and closes under the control of another electrical circuit. ... Structure of a vacuum tube diode Structure of a vacuum tube triode In electronics, a vacuum tube, electron tube, or (outside North America) thermionic valve or just valve, is a device used to amplify, switch or modify a signal by controlling the movement of electrons in an evacuated space. ... Direct current (DC or continuous current) is the continuous flow of electricity through a conductor such as a wire from high to low potential. ... In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. ... Electrical switches. ... The EDVAC as installed in Building 328 at the Ballistics Research Laboratory. ... Portion of the Harvard-IBM Mark 1, left side. ... The clock rate is the fundamental rate in cycles per second (measured in hertz) at which a computer performs its most basic operations such as adding two numbers or transferring a value from one processor register to another. ... This article is about the SI unit of frequency. ...


Discrete transistor and IC CPUs

CPU, core memory, and external bus interface of an MSI PDP-8/I.

The design complexity of CPUs increased as various technologies facilitated building smaller and more reliable electronic devices. The first such improvement came with the advent of the transistor. Transistorized CPUs during the 1950s and 1960s no longer had to be built out of bulky, unreliable, and fragile switching elements like vacuum tubes and electrical relays. With this improvement more complex and reliable CPUs were built onto one or several printed circuit boards containing discrete (individual) components. Image File history File links Download high resolution version (1600x1200, 345 KB) Summary Image showing the internals of a PDP-8/I. Pictured are the CPU (including the major registers and an extended arithmetic unit), memory controller, 4 kilowords magnetic core memory, external bus interface, TTY interface, and paper punched... Image File history File links Download high resolution version (1600x1200, 345 KB) Summary Image showing the internals of a PDP-8/I. Pictured are the CPU (including the major registers and an extended arithmetic unit), memory controller, 4 kilowords magnetic core memory, external bus interface, TTY interface, and paper punched... A 16×16 cm area core memory plane of 128×128 bits, i. ... In computer architecture, a bus is a subsystem that transfers data or power between computer components inside a computer or between computers and typically is controlled by device driver software. ... A PDP-8 on display at the Smithsonians National Museum of American History in Washington, D.C.. This example is from the first generation of PDP-8s, built with discrete transistors and later known as the Straight 8. ... Assorted discrete transistors A transistor is a semiconductor device, commonly used as an amplifier or an electrically controlled switch. ... Structure of a vacuum tube diode Structure of a vacuum tube triode In electronics, a vacuum tube, electron tube, or (outside North America) thermionic valve or just valve, is a device used to amplify, switch or modify a signal by controlling the movement of electrons in an evacuated space. ... Automotive style miniature relay A relay is an electrical switch that opens and closes under the control of another electrical circuit. ... Part of a 1983 Sinclair ZX Spectrum computer board. ...


During this period, a method of manufacturing many transistors in a compact space gained popularity.The integrated circuit (IC) allowed a large number of transistors to be manufactured on a single semiconductor-based die, or "chip." At first only very basic non-specialized digital circuits such as NOR gates were miniaturized into ICs. CPUs based upon these "building block" ICs are generally referred to as "small-scale integration" (SSI) devices. SSI ICs, such as the ones used in the Apollo guidance computer, usually contained transistor counts numbering in multiples of ten. To build an entire CPU out of SSI ICs required thousands of individual chips, but still consumed much less space and power than earlier discrete transistor designs. As microelectronic technology advanced, an increasing number of transistors were placed on ICs, thus decreasing the quantity of individual ICs needed for a complete CPU. MSI and LSI (medium- and large-scale integration) ICs increased transistor counts to hundreds, then thousands. Integrated circuit of Atmel Diopsis 740 System on Chip showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window, showing the integrated circuit inside. ... A semiconductor is a solid material that has electrical conductivity in between that of a conductor and that of an insulator; it can vary over that wide range either permanently or dynamically. ... A die in the context of integrated circuits is a small piece of semiconducting material on which a given circuit is fabricated. ... The NOR gate is a digital logic gate that implements logical NOR - it behaves according to the truth table to the right. ... The references in this article would be clearer with a different and/or consistent style of citation, footnoting or external linking. ...


In 1964 IBM introduced its System/360 computer architecture, which was used in a series of computers that could run the same programs with different speed and performance. This was significant at a time when most electronic computers were incompatible with one another, even those made by the same manufacturer. To facilitate this improvement, IBM utilized the concept of a microprogram (often called "microcode"), which still sees widespread usage in modern CPUs (Amdahl et al. 1964). The System/360 architecture was so popular that it dominated the mainframe computer market for the next few decades and left a legacy that is still continued by similar modern computers like the IBM zSeries. In the same year (1964), Digital Equipment Corporation (DEC) introduced another influential computer aimed at the scientific and research markets, the PDP-8. DEC would later introduce the extremely popular PDP-11 line that originally was built with SSI ICs but was eventually implemented with LSI components once these became practical. In stark contrast with its SSI and MSI predecessors, the first LSI implementation of the PDP-11 contained a CPU composed of only four LSI integrated circuits (Digital Equipment Corporation 1975). For other uses, see IBM (disambiguation) and Big Blue. ... System/360 Model 65 operators console, with register value lamps and toggle switches (middle of picture) and emergency pull switch (upper right). ... A microprogram implements a CPU instruction set. ... For other uses, see Mainframe. ... Since December, 2001, IBM designates all its mainframes with the name eServer zSeries, with the e depicted in IBMs well-known red trademarked symbol. ... Digital Equipment Corporation was a pioneering American company in the computer industry. ... A PDP-8 on display at the Smithsonians National Museum of American History in Washington, D.C.. This example is from the first generation of PDP-8s, built with discrete transistors and later known as the Straight 8. ... The PDP-11 was a 16-bit minicomputer sold by Digital Equipment Corp. ...


Transistor-based computers had several distinct advantages over their predecessors. Aside from facilitating increased reliability and lower power consumption, transistors also allowed CPUs to operate at much higher speeds because of the short switching time of a transistor in comparison to a tube or relay. Thanks to both the increased reliability as well as the dramatically increased speed of the switching elements (which were almost exclusively transistors by this time), CPU clock rates in the tens of megahertz were obtained during this period. Additionally, while discrete transistor and IC CPUs were in heavy usage, new high-performance designs like SIMD (Single Instruction Multiple Data) vector processors began to appear. These early experimental designs later gave rise to the era of specialized supercomputers like those made by Cray Inc.-1... Processor board of a CRAY YMP vector computer A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. ... For other uses, see Supercomputer (disambiguation). ... Cray Inc. ...


Microprocessors

Main article: Microprocessor
Intel 80486DX2 microprocessor in a ceramic PGA package

The introduction of the microprocessor in the 1970s significantly affected the design and implementation of CPUs. Since the introduction of the first microprocessor (the Intel 4004) in 1970 and the first widely used microprocessor (the Intel 8080) in 1974, this class of CPUs has almost completely overtaken all other central processing unit implementation methods. Mainframe and minicomputer manufacturers of the time launched proprietary IC development programs to upgrade their older computer architectures, and eventually produced instruction set compatible microprocessors that were backward-compatible with their older hardware and software. Combined with the advent and eventual vast success of the now ubiquitous personal computer, the term "CPU" is now applied almost exclusively to microprocessors. A microprocessor incorporates most or all of the functions of a central processing unit (CPU) on a single integrated circuit (IC). ... Image File history File links Download high resolution version (1110x908, 201 KB) Intel 80486DX CPU. Bottom view with gold plated pins Photograph © Andrew Dunn, 9 November 2005. ... Image File history File links Download high resolution version (1110x908, 201 KB) Intel 80486DX CPU. Bottom view with gold plated pins Photograph © Andrew Dunn, 9 November 2005. ... An Intel i486DX2-66 Microprocessor, top view ... and bottom view with gold plated pins. ... Package Diagram for 168-Pin PGA Embedded IntelDX2™ Processor The pin grid array or PGA is a type of packaging used for integrated circuits, particularly microprocessors. ... A microprocessor incorporates most or all of the functions of a central processing unit (CPU) on a single integrated circuit (IC). ... The Intel 4004 is a 4-bit central processing unit (CPU) released by Intel Corporation in 1971. ... AMD clone NEC 8080AF (2nd-source). ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ...


Previous generations of CPUs were implemented as discrete components and numerous small integrated circuits (ICs) on one or more circuit boards. Microprocessors, on the other hand, are CPUs manufactured on a very small number of ICs; usually just one. The overall smaller CPU size as a result of being implemented on a single die means faster switching time because of physical factors like decreased gate parasitic capacitance. This has allowed synchronous microprocessors to have clock rates ranging from tens of megahertz to several gigahertz. Additionally, as the ability to construct exceedingly small transistors on an IC has increased, the complexity and number of transistors in a single CPU has increased dramatically. This widely observed trend is described by Moore's law, which has proven to be a fairly accurate predictor of the growth of CPU (and other IC) complexity to date. Integrated circuit of Atmel Diopsis 740 System on Chip showing memory blocks, logic and input/output pads around the periphery Microchips with a transparent window, showing the integrated circuit inside. ... Capacitance is a measure of the amount of electric charge stored (or separated) for a given electric potential. ... Gordon Moores original graph from 1965 Growth of transistor counts for Intel processors (dots) and Moores Law (upper line=18 months; lower line=24 months) For the observation regarding information retrieval, see Mooers Law. ...


While the complexity, size, construction, and general form of CPUs have changed drastically over the past sixty years, it is notable that the basic design and function has not changed much at all. Almost all common CPUs today can be very accurately described as von Neumann stored-program machines. As the aforementioned Moore's law continues to hold true, concerns have arisen about the limits of integrated circuit transistor technology. Extreme miniaturization of electronic gates is causing the effects of phenomena like electromigration and subthreshold leakage to become much more significant. These newer concerns are among the many factors causing researchers to investigate new methods of computing such as the quantum computer, as well as to expand the usage of parallelism and other methods that extend the usefulness of the classical von Neumann model. Electromigration is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms. ... Subthreshold leakage of an NMOS Subthreshold leakage is the current that flows from the drain to source of a MOSFET when the transistor is supposed to be off. ... The Bloch sphere is a representation of a qubit, the fundamental building block of quantum computers. ... Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ...


CPU operation

The fundamental operation of most CPUs, regardless of the physical form they take, is to execute a sequence of stored instructions called a program. Discussed here are devices that conform to the common von Neumann architecture. The program is represented by a series of numbers that are kept in some kind of computer memory. There are four steps that nearly all von Neumann CPUs use in their operation: fetch, decode, execute, and writeback. Design of the Von Neumann architecture For the robotic architecture also named after Von Neumann, see Von Neumann machine The von Neumann architecture is a computer design model that uses a single storage structure to hold both instructions and data. ... To meet Wikipedias quality standards, this article or section may require cleanup. ...

Diagram showing how one MIPS32 instruction is decoded. (MIPS Technologies 2005)

The first step, fetch, involves retrieving an instruction (which is represented by a number or sequence of numbers) from program memory. The location in program memory is determined by a program counter (PC), which stores a number that identifies the current position in the program. In other words, the program counter keeps track of the CPU's place in the current program. After an instruction is fetched, the PC is incremented by the length of the instruction word in terms of memory units.[3] Often the instruction to be fetched must be retrieved from relatively slow memory, causing the CPU to stall while waiting for the instruction to be returned. This issue is largely addressed in modern processors by caches and pipeline architectures (see below). Image File history File links Mips32_addi. ... Image File history File links Mips32_addi. ... A MIPS R4400 microprocessor made by Toshiba. ... In computer science, an instruction typically refers to a single operation of a processor within a computer architecture. ... The program counter (also called the instruction pointer in some computers) is a register in a computer processor which indicates where the computer is in its instruction sequence. ...


The instruction that the CPU fetches from memory is used to determine what the CPU is to do. In the decode step, the instruction is broken up into parts that have significance to other portions of the CPU. The way in which the numerical instruction value is interpreted is defined by the CPU's instruction set architecture (ISA).[4] Often, one group of numbers in the instruction, called the opcode, indicates which operation to perform. The remaining parts of the number usually provide information required for that instruction, such as operands for an addition operation. Such operands may be given as a constant value (called an immediate value), or as a place to locate a value: a register or a memory address, as determined by some addressing mode. In older designs the portions of the CPU responsible for instruction decoding were unchangeable hardware devices. However, in more abstract and complicated CPUs and ISAs, a microprogram is often used to assist in translating instructions into various configuration signals for the CPU. This microprogram is sometimes rewritable so that it can be modified to change the way the CPU decodes instructions even after it has been manufactured. An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ... Microprocessors perform operations using binary bits (on/off/1or0). ... 3 + 2 = 5 with apples, a popular choice in textbooks[1] This article is about addition in mathematics. ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... In computer science, a memory address is a unique identifier for a memory location at which a CPU or other device can store a piece of data for later retrieval. ... Addressing modes, a concept from computer science, are an aspect of the instruction set architecture in most central processing unit (CPU) designs. ... A microprogram implements a CPU instruction set. ...

Block diagram of a simple CPU

After the fetch and decode steps, the execute step is performed. During this step, various portions of the CPU are connected so they can perform the desired operation. If, for instance, an addition operation was requested, an arithmetic logic unit (ALU) will be connected to a set of inputs and a set of outputs. The inputs provide the numbers to be added, and the outputs will contain the final sum. The ALU contains the circuitry to perform simple arithmetic and logical operations on the inputs (like addition and bitwise operations). If the addition operation produces a result too large for the CPU to handle, an arithmetic overflow flag in a flags register may also be set (see the discussion of integer range below). Image File history File links CPU_block_diagram. ... Image File history File links CPU_block_diagram. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ... In computer programming, a bitwise operation operates on one or two bit patterns or binary numerals at the level of their individual bits. ... The term arithmetic overflow or simply overflow has the following meanings. ...


The final step, writeback, simply "writes back" the results of the execute step to some form of memory. Very often the results are written to some internal CPU register for quick access by subsequent instructions. In other cases results may be written to slower, but cheaper and larger, main memory. Some types of instructions manipulate the program counter rather than directly produce result data. These are generally called "jumps" and facilitate behavior like loops, conditional program execution (through the use of a conditional jump), and functions in programs.[5] Many instructions will also change the state of digits in a "flags" register. These flags can be used to influence how a program behaves, since they often indicate the outcome of various operations. For example, one type of "compare" instruction considers two values and sets a number in the flags register according to which one is greater. This flag could then be used by a later jump instruction to determine program flow. RAM redirects here. ... In computer science control flow (or alternatively, flow of control) refers to the order in which the individual statements, instructions or function calls of an imperative or functional program are executed or evaluated. ... In computer science, a subroutine (function, method, procedure, or subprogram) is a portion of code within a larger program, which performs a specific task and can be relatively independent of the remaining code. ...


After the execution of the instruction and writeback of the resulting data, the entire process repeats, with the next instruction cycle normally fetching the next-in-sequence instruction because of the incremented value in the program counter. If the completed instruction was a jump, the program counter will be modified to contain the address of the instruction that was jumped to, and program execution continues normally. In more complex CPUs than the one described here, multiple instructions can be fetched, decoded, and executed simultaneously. This section describes what is generally referred to as the "Classic RISC pipeline," which in fact is quite common among the simple CPUs used in many electronic devices (often called microcontrollers[clarify]).[6] In history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. ... It has been suggested that this article or section be merged with embedded microprocessor. ...


Design and implementation

Main article: CPU design
Prerequisites
Computer architecture
Digital circuits

CPU design is the hardware design of a central processing unit. ... A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... Digital circuits are electric circuits based on a number of discrete voltage levels. ...

Integer range

The way a CPU represents numbers is a design choice that affects the most basic ways in which the device functions. Some early digital computers used an electrical model of the common decimal (base ten) numeral system to represent numbers internally. A few other computers have used more exotic numeral systems like ternary (base three). Nearly all modern CPUs represent numbers in binary form, with each digit being represented by some two-valued physical quantity such as a "high" or "low" voltage.[7] For other uses, see Decimal (disambiguation). ... This article is about different methods of expressing numbers with symbols. ... Balanced ternary is a non-standard positional numeral system, useful for comparison logic. ... The binary numeral system, or base-2 number system, is a numeral system that represents numeric values using two symbols, usually 0 and 1. ... Josephson junction array chip developed by NIST as a standard volt. ...

MOS 6502 microprocessor in a dual in-line package, an extremely popular 8-bit design.

Related to number representation is the size and precision of numbers that a CPU can represent. In the case of a binary CPU, a bit refers to one significant place in the numbers a CPU deals with. The number of bits (or numeral places) a CPU uses to represent numbers is often called "word size", "bit width", "data path width", or "integer precision" when dealing with strictly integer numbers (as opposed to floating point). This number differs between architectures, and often within different parts of the very same CPU. For example, an 8-bit CPU deals with a range of numbers that can be represented by eight binary digits (each digit having two possible values), that is, 28 or 256 discrete numbers. In effect, integer size sets a hardware limit on the range of integers the software run by the CPU can utilize.[8] Wikipedia does not have an article with this exact name. ... Wikipedia does not have an article with this exact name. ... The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. ... ICs in DIP14-Package Several PDIPs and CERDIPS. The large CERDIP in the foreground is an 8080 processor. ... In computing, word is a term for the natural unit of data used by a particular computer design. ... 8-bit refers to the number of bits used in the data bus of a computer. ...


Integer range can also affect the number of locations in memory the CPU can address (locate). For example, if a binary CPU uses 32 bits to represent a memory address, and each memory address represents one octet (8 bits), the maximum quantity of memory that CPU can address is 232 octets, or 4 GiB. This is a very simple view of CPU address space, and many designs use more complex addressing methods like paging in order to locate more memory than their integer range would allow with a flat address space. In computing, an octet is a grouping of eight bits. ... The term gib may refer to: a castrated male cat or ferret an abbreviation for gibibyte (GiB) or gibibit (Gib) an abbreviation for Gibraltar an abbreviation for Gib Board, itself an abbreviation of Gibraltar Board, all Winston Wallboards[1] tradenames for drywall (plasterboard). ... In computing, an address space defines a range of discrete addresses, each of which may correspond to a physical or virtual memory register, a network host, peripheral device, disk sector or other logical or physical entity. ... Bank switching (also known as paging, but only loosely related to the ordinary meaning of paging in computing) was a technique common in 8-bit microcomputer systems, to increase the amount of addressable RAM and ROM without extending the address bus. ...


Higher levels of integer range require more structures to deal with the additional digits, and therefore more complexity, size, power usage, and general expense. It is not at all uncommon, therefore, to see 4- or 8-bit microcontrollers used in modern applications, even though CPUs with much higher range (such as 16, 32, 64, even 128-bit) are available. The simpler microcontrollers are usually cheaper, use less power, and therefore dissipate less heat, all of which can be major design considerations for electronic devices. However, in higher-end applications, the benefits afforded by the extra range (most often the additional address space) are more significant and often affect design choices. To gain some of the advantages afforded by both lower and higher bit lengths, many CPUs are designed with different bit widths for different portions of the device. For example, the IBM System/370 used a CPU that was primarily 32 bit, but it used 128-bit precision inside its floating point units to facilitate greater accuracy and range in floating point numbers (Amdahl et al. 1964). Many later CPU designs use similar mixed bit width, especially when the processor is meant for general-purpose usage where a reasonable balance of integer and floating point capability is required. It has been suggested that this article or section be merged with embedded microprocessor. ... IBM logo The IBM System/370 (often: S/370) was a model range of IBM mainframes announced on June 30, 1970 as the successors to the System/360 family. ... A floating-point number is a digital representation for a number in a certain subset of the rational numbers, and is often used to approximate an arbitrary real number on a computer. ...


Clock rate

Main article: Clock rate

Most CPUs, and indeed most sequential logic devices, are synchronous in nature.[9] That is, they are designed and operate on assumptions about a synchronization signal. This signal, known as a clock signal, usually takes the form of a periodic square wave. By calculating the maximum time that electrical signals can move in various branches of a CPU's many circuits, the designers can select an appropriate period for the clock signal. The clock rate is the fundamental rate in cycles per second (measured in hertz) at which a computer performs its most basic operations such as adding two numbers or transferring a value from one processor register to another. ... In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. ... A square wave is a kind of basic waveform. ... For other uses, see Frequency (disambiguation). ...


This period must be longer than the amount of time it takes for a signal to move, or propagate, in the worst-case scenario. In setting the clock period to a value well above the worst-case propagation delay, it is possible to design the entire CPU and the way it moves data around the "edges" of the rising and falling clock signal. This has the advantage of simplifying the CPU significantly, both from a design perspective and a component-count perspective. However, it also carries the disadvantage that the entire CPU must wait on its slowest elements, even though some portions of it are much faster. This limitation has largely been compensated for by various methods of increasing CPU parallelism (see below).


However architectural improvements alone do not solve all of the drawbacks of globally synchronous CPUs. For example, a clock signal is subject to the delays of any other electrical signal. Higher clock rates in increasingly complex CPUs make it more difficult to keep the clock signal in phase (synchronized) throughout the entire unit. This has led many modern CPUs to require multiple identical clock signals to be provided in order to avoid delaying a single signal significantly enough to cause the CPU to malfunction. Another major issue as clock rates increase dramatically is the amount of heat that is dissipated by the CPU. The constantly changing clock causes many components to switch regardless of whether they are being used at that time. In general, a component that is switching uses more energy than an element in a static state. Therefore, as clock rate increases, so does heat dissipation, causing the CPU to require more effective cooling solutions.


One method of dealing with the switching of unneeded components is called clock gating, which involves turning off the clock signal to unneeded components (effectively disabling them). However, this is often regarded as difficult to implement and therefore does not see common usage outside of very low-power designs.[10] Another method of addressing some of the problems with a global clock signal is the removal of the clock signal altogether. While removing the global clock signal makes the design process considerably more complex in many ways, asynchronous (or clockless) designs carry marked advantages in power consumption and heat dissipation in comparison with similar synchronous designs. While somewhat uncommon, entire CPUs have been built without utilizing a global clock signal. Two notable examples of this are the ARM compliant AMULET and the MIPS R3000 compatible MiniMIPS. Rather than totally removing the clock signal, some CPU designs allow certain portions of the device to be asynchronous, such as using asynchronous ALUs in conjunction with superscalar pipelining to achieve some arithmetic performance gains. While it is not altogether clear whether totally asynchronous designs can perform at a comparable or better level than their synchronous counterparts, it is evident that they do at least excel in simpler math operations. This, combined with their excellent power consumption and heat dissipation properties, makes them very suitable for embedded computers (Garside et al. 1999). Clock gating is one of the power-saving techniques used on the Pentium 4 processor. ... The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ... AMULET is a series of microprocessors that implement the ARM processor architecture. ... A MIPS R4400 microprocessor made by Toshiba. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ... An embedded system is a special-purpose computer system, which is completely encapsulated by the device it controls. ...


Parallelism

Main article: Parallel computing
Model of a subscalar CPU. Notice that it takes fifteen cycles to complete three instructions.

The description of the basic operation of a CPU offered in the previous section describes the simplest form that a CPU can take. This type of CPU, usually referred to as subscalar, operates on and executes one instruction on one or two pieces of data at a time. Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ... Image File history File links Download high resolution version (880x163, 5 KB) Title : Instruction scheduling without pipeline. ... Image File history File links Download high resolution version (880x163, 5 KB) Title : Instruction scheduling without pipeline. ...


This process gives rise to an inherent inefficiency in subscalar CPUs. Since only one instruction is executed at a time, the entire CPU must wait for that instruction to complete before proceeding to the next instruction. As a result the subscalar CPU gets "hung up" on instructions which take more than one clock cycle to complete execution. Even adding a second execution unit (see below) does not improve performance much; rather than one pathway being hung up, now two pathways are hung up and the number of unused transistors is increased. This design, wherein the CPU's execution resources can operate on only one instruction at a time, can only possibly reach scalar performance (one instruction per clock). However, the performance is nearly always subscalar (less than one instruction per cycle).


Attempts to achieve scalar and better performance have resulted in a variety of design methodologies that cause the CPU to behave less linearly and more in parallel. When referring to parallelism in CPUs, two terms are generally used to classify these design techniques. Instruction level parallelism (ILP) seeks to increase the rate at which instructions are executed within a CPU (that is, to increase the utilization of on-die execution resources), and thread level parallelism (TLP) purposes to increase the number of threads (effectively individual programs) that a CPU can execute simultaneously. Each methodology differs both in the ways in which they are implemented, as well as the relative effectiveness they afford in increasing the CPU's performance for an application.[11] Instruction-level parallelism (ILP) is a measure of how many of the operations in a computer program can be dealt with at once. ... Thread-level parallelism (TLP) is the parallelism inherent in an application that runs multiple threads at once. ... For the form of code consisting entirely of subroutine calls, see Threaded code. ...


Instruction level parallelism

Basic five-stage pipeline. In the best case scenario, this pipeline can sustain a completion rate of one instruction per cycle.

One of the simplest methods used to accomplish increased parallelism is to begin the first steps of instruction fetching and decoding before the prior instruction finishes executing. This is the simplest form of a technique known as instruction pipelining, and is utilized in almost all modern general-purpose CPUs. Pipelining allows more than one instruction to be executed at any given time by breaking down the execution pathway into discrete stages. This separation can be compared to an assembly line, in which an instruction is made more complete at each stage until it exits the execution pipeline and is retired. Instruction pipelining is a method for increasing the throughput of a digital circuit, particularly a CPU, and implements a form of instruction level parallelism. ... Simple superscalar pipeline. ... Image File history File links Download high resolution version (972x282, 7 KB) Title : Instruction scheduling using a 5 stages pipeline. ... Image File history File links Download high resolution version (972x282, 7 KB) Title : Instruction scheduling using a 5 stages pipeline. ... Instruction pipelining is a method for increasing the throughput of a digital circuit, particularly a CPU, and implements a form of instruction level parallelism. ...


Pipelining does, however, introduce the possibility for a situation where the result of the previous operation is needed to complete the next operation; a condition often termed data dependency conflict. To cope with this, additional care must be taken to check for these sorts of conditions and delay a portion of the instruction pipeline if this occurs. Naturally, accomplishing this requires additional circuitry, so pipelined processors are more complex than subscalar ones (though not very significantly so). A pipelined processor can become very nearly scalar, inhibited only by pipeline stalls (an instruction spending more than one clock cycle in a stage).

Simple superscalar pipeline. By fetching and dispatching two instructions at a time, a maximum of two instructions per cycle can be completed.

Further improvement upon the idea of instruction pipelining led to the development of a method that decreases the idle time of CPU components even further. Designs that are said to be superscalar include a long instruction pipeline and multiple identical execution units. [Huynh 2003] In a superscalar pipeline, multiple instructions are read and passed to a dispatcher, which decides whether or not the instructions can be executed in parallel (simultaneously). If so they are dispatched to available execution units, resulting in the ability for several instructions to be executed simultaneously. In general, the more instructions a superscalar CPU is able to dispatch simultaneously to waiting execution units, the more instructions will be completed in a given cycle. Image File history File links Download high resolution version (971x561, 11 KB) Title : Instruction scheduling on a 5 stages pipeline super scalar CPU (degree = 2). ... Image File history File links Download high resolution version (971x561, 11 KB) Title : Instruction scheduling on a 5 stages pipeline super scalar CPU (degree = 2). ...


Most of the difficulty in the design of a superscalar CPU architecture lies in creating an effective dispatcher. The dispatcher needs to be able to quickly and correctly determine whether instructions can be executed in parallel, as well as dispatch them in such a way as to keep as many execution units busy as possible. This requires that the instruction pipeline is filled as often as possible and gives rise to the need in superscalar architectures for significant amounts of CPU cache. It also makes hazard-avoiding techniques like branch prediction, speculative execution, and out-of-order execution crucial to maintaining high levels of performance. By attempting to predict which branch (or path) a conditional instruction will take, the CPU can minimize the number of times that the entire pipeline must wait until a conditional instruction is completed. Speculative execution often provides modest performance increases by executing portions of code that may or may not be needed after a conditional operation completes. Out-of-order execution somewhat rearranges the order in which instructions are executed to reduce delays due to data dependencies. Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... In computer architecture, a hazard is a potential problem that can happen in a pipelined processor. ... In computer architecture, a branch predictor is the part of a processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. ... In computer science, speculative execution is the execution of code whose result may not actually be needed. ... In computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ...


In the case where a portion of the CPU is superscalar and part is not, the part which is not suffers a performance penalty due to scheduling stalls. The original Intel Pentium (P5) had two superscalar ALUs which could accept one instruction per clock each, but its FPU could not accept one instruction per clock. Thus the P5 was integer superscalar but not floating point superscalar. Intel's successor to the Pentium architecture, P6, added superscalar capabilities to its floating point features, and therefore afforded a significant increase in floating point instruction performance. Pentium MMX - top view The Pentium is a fifth-generation x86 architecture microprocessor by Intel which first shipped on March 22, 1993. ... The P6 microarchitecture is the sixth generation Intel x86 microprocessor architecture, released in 1995. ...


Both simple pipelining and superscalar design increase a CPU's ILP by allowing a single processor to complete execution of instructions at rates surpassing one instruction per cycle (IPC).[12] Most modern CPU designs are at least somewhat superscalar, and nearly all general purpose CPUs designed in the last decade are superscalar. In later years some of the emphasis in designing high-ILP computers has been moved out of the CPU's hardware and into its software interface, or ISA. The strategy of the very long instruction word (VLIW) causes some ILP to become implied directly by the software, reducing the amount of work the CPU must perform to boost ILP and thereby reducing the design's complexity. A Very Long Instruction Word or VLIW CPU architecture implements a form of instruction level parallelism. ...


Thread level parallelism

Another strategy of achieving performance is to execute multiple programs or threads in parallel. This area of research is known as parallel computing. In Flynn's taxonomy, this strategy is known as Multiple Instructions-Multiple Data or MIMD. For the form of code consisting entirely of subroutine calls, see Threaded code. ... Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ... Flynns taxonomy is a classification of computer architectures, proposed by Michael J. Flynn in 1972. ...


One technology used for this purpose was multiprocessing (MP). The initial flavor of this technology is known as symmetric multiprocessing (SMP), where a small number of CPUs share a coherent view of their memory system. In this scheme, each CPU has additional hardware to maintain a constantly up-to-date view of memory. By avoiding stale views of memory, the CPUs can cooperate on the same program and programs can migrate from one CPU to another. To increase the number of cooperating CPUs beyond a handful, schemes such as non-uniform memory access (NUMA) and directory-based coherence protocols were introduced in the 1990s. SMP systems are limited to a small number of CPUs while NUMA systems have been built with thousands of processors. Initially, multiprocessing was built using multiple discrete CPUs and boards to implement the interconnect between the processors. When the processors and their interconnect are all implemented on a single silicon chip, the technology is known as a multi-core microprocessor. Multiprocessing is traditionally known as the use of multiple concurrent processes in a system as opposed to a single process at any one instant. ... Symmetric multiprocessing, or SMP, is a multiprocessor computer architecture where two or more identical processors are connected to a single shared main memory. ... Non-Uniform Memory Access or Non-Uniform Memory Architecture (NUMA) is a computer memory design used in multiprocessors, where the memory access time depends on the memory location relative to a processor. ... Directory-based coherence protocols are a set of cache coherence protocols, that is, protocols which ensure cache coherence or memory coherence between multiple nodes of multiprocessor or distributed shared memory systems, such as ccNUMA. In such protocols, directories track where each page, or block of memory, has been cached. ... Diagram of an Intel Core 2 dual core processor, with CPU-local Level 1 caches, and a shared, on-die Level 2 cache. ...


It was later recognized that finer-grain parallelism existed with a single program. A single program might have several threads (or functions) that could be executed separately or in parallel. Some of earliest examples of this technology implemented input/output processing such as direct memory access as a separate thread from the computation thread. A more general approach to this technology was introduced in the 1970s when systems were designed to run multiple computation threads in parallel. This technology is known as multi-threading (MT). This approach is considered more cost-effective than multiprocessing, as only a small number of components within a CPU is replicated in order to support MT as opposed to the entire CPU in the case of MP. In MT, the execution units and the memory system including the caches are shared among multiple threads. The downside of MT is that the hardware support for multithreading is more visible to software than that of MP and thus supervisor software like operating systems have to undergo larger changes to support MT. One type of MT that was implemented is known as block multithreading, where one thread is executed until it is stalled waiting for data to return from external memory. In this scheme, the CPU would then quickly switch to another thread which is ready to run, the switch often done in one CPU clock cycle. Another type of MT is known as simultaneous multithreading, where instructions of multiple threads are executed in parallel within one CPU clock cycle. Energy Input: The energy placed into a reaction. ... Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. ... Many programming languages, operating systems, and other software development environments support what are called threads of execution. ... Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs. ...


For several decades from the 1970s to early 2000s, the focus in designing high performance general purpose CPUs was largely on achieving high ILP through technologies such as pipelining, caches, superscalar execution, Out-of-order execution, etc. This trend culminated in large, power-hungry CPUs such as the Intel Pentium 4. By the early 2000s, CPU designers were thwarted from achieving higher performance from ILP techniques due to the growing disparity between CPU operating frequencies and main memory operating frequencies as well as escalating CPU power dissipation owing to more esoteric ILP techniques. The Pentium 4[1] brand refers to Intels single-core mainstream desktop and laptop CPUs introduced on November 20, 2000[2] (August 8, 2008 is the date of last shipments of Pentium 4s[3]). They had the 7th-generation architecture - called NetBurst - which was the companys first all...


CPU designers then borrowed ideas from commercial computing markets such as transaction processing, where the aggregate performance of multiple programs, also known as throughput computing, was more important than the performance of a single thread or program. In computer science, transaction processing is information processing that is divided into individual, indivisible operations, called Each transaction must succeed or fail as a complete unit; it cannot remain in an intermediate state. ... In communication networks, throughput is the amount of digital data per time unit that is delivered over a physical or logical link, or that is passing through a certain network node. ...


This reversal of emphasis is evidenced by the proliferation of dual and multiple core CMP (chip-level multiprocessing) designs and notably, Intel's newer designs resembling its less superscalar P6 architecture. Late designs in several processor families exhibit CMP, including the x86-64 Opteron and Athlon 64 X2, the SPARC UltraSPARC T1, IBM POWER4 and POWER5, as well as several video game console CPUs like the Xbox 360's triple-core PowerPC design, and the PS3's 7-core Cell microprocessor. The P6 microarchitecture is the sixth generation Intel x86 microprocessor architecture, released in 1995. ... The AMD64 or x86-64 is a 64-bit processor architecture invented by AMD. It is a superset of the x86 architecture, which it natively supports. ... The Opteron is AMDs x86 server processor line, and was the first processor to implement the AMD64 instruction set architecture (known generically as x86-64). ... Athlon 64 X2 Logo Athlon 64 X2 E6 3800+ The Athlon 64 X2 is the first dual-core desktop CPU manufactured by AMD. It is essentially a processor consisting of two Athlon 64 cores joined together on one die with additional control logic. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... Sun Microsystems UltraSPARC T1 microprocessor, known until its 14 November 2005 announcement by its development codename Niagara , is a multithreading, multicore CPU. Designed to lower the energy consumption of server computers, the CPU uses typically 72 W of power at 1. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... POWER5 dual-MCM POWER5 quad-MCM POWER5 is a microprocessor developed by IBM. It is an improved variant of the highly successful POWER4. ... Game console redirects here. ... It has been suggested that Xbox 360 Elite be merged into this article or section. ... “PS3” redirects here. ... Layout of the IBM Cell die Cell is a microprocessor architecture jointly developed by a Sony, Toshiba, and IBM, an alliance known as STI. The architectural design and first implementation were carried out at the STI Design Center over a four-year period beginning March 2001 on a budget reported...


Data parallelism

Main articles: Vector processor and SIMD

A less common but increasingly important paradigm of CPUs (and indeed, computing in general) deals with data parallelism. The processors discussed earlier are all referred to as some type of scalar device.[13] As the name implies, vector processors deal with multiple pieces of data in the context of one instruction. This contrasts with scalar processors, which deal with one piece of data for every instruction. Using Flynn's taxonomy, these two schemes of dealing with data are generally referred to as SISD (single instruction, single data) and SIMD (single instruction, multiple data), respectively. The great utility in creating CPUs that deal with vectors of data lies in optimizing tasks that tend to require the same operation (for example, a sum or a dot product) to be performed on a large set of data. Some classic examples of these types of tasks are multimedia applications (images, video, and sound), as well as many types of scientific and engineering tasks. Whereas a scalar CPU must complete the entire process of fetching, decoding, and executing each instruction and value in a set of data, a vector CPU can perform a single operation on a comparatively large set of data with one instruction. Of course, this is only possible when the application tends to require many steps which apply one operation to a large set of data. Processor board of a CRAY YMP vector computer A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. ... -1... Flynns taxonomy is a classification of computer architectures, proposed by Michael J. Flynn in 1972. ... SISD is an acronym for Single Instruction stream over a Single Data stream. ... -1... In mathematics, the dot product, also known as the scalar product, is a binary operation which takes two vectors over the real numbers R and returns a real-valued scalar quantity. ... Look up Multimedia in Wiktionary, the free dictionary. ... Scientific computing (or computational science) is the field of study concerned with constructing mathematical models and numerical solution techniques and using computers to analyze and solve scientific and engineering problems. ...


Most early vector CPUs, such as the Cray-1, were associated almost exclusively with scientific research and cryptography applications. However, as multimedia has largely shifted to digital media, the need for some form of SIMD in general-purpose CPUs has become significant. Shortly after floating point execution units started to become commonplace to include in general-purpose processors, specifications for and implementations of SIMD execution units also began to appear for general-purpose CPUs. Some of these early SIMD specifications like Intel's MMX were integer-only. This proved to be a significant impediment for some software developers, since many of the applications that benefit from SIMD primarily deal with floating point numbers. Progressively, these early designs were refined and remade into some of the common, modern SIMD specifications, which are usually associated with one ISA. Some notable modern examples are Intel's SSE and the PowerPC-related AltiVec (also known as VMX).[14] CRAY-1 at the EPFL in Switzerland. ... The German Lorenz cipher machine, used in World War II for encryption of very high-level general staff messages Cryptography (or cryptology; derived from Greek κρυπτός kryptós hidden, and the verb γράφω gráfo write or λεγειν legein to speak) is the study of message secrecy. ... A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ... This article is about the computer processor instruction set. ... A floating-point number is a digital representation for a number in a certain subset of the rational numbers, and is often used to approximate an arbitrary real number on a computer. ... SSE (Streaming SIMD Extensions, originally called ISSE, Internet Streaming SIMD Extensions) is a SIMD (Single Instruction, Multiple Data) instruction set designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMDs 3DNow! (which had debuted a year earlier). ... AltiVec is a floating point and integer SIMD instruction set designed and owned by Apple Computer, IBM and Motorola (the AIM alliance), and implemented on versions of the PowerPC including Motorolas G4 and IBMs G5 processors. ...

A typical vision of a computer architecture as a series of abstraction layers: hardware, firmware, assembler, kernel, operating system and applications (see also Tanenbaum 79). ... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... This article does not cite any references or sources. ... A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... Explicitly Parallel Instruction Computing (EPIC) is a computing paradigm that began to be researched in the early 1980s resulting in a U.S. patent 4,847,755 (Gordon Morrison, et. ... A Very Long Instruction Word or VLIW CPU architecture implements a form of instruction level parallelism. ... The One Instruction Set Computer is a single machine language opcode which is sufficient to produce a Turing complete machine. ... In computer science, ZISC stands for Zero Instruction Set Computer, which refers to a chip technology based on pure pattern matching and absence of (micro-)instructions in the classical sense. ... The term Harvard architecture originally referred to computer architectures that used physically separate storage and signal pathways for their instructions and data (in contrast to the von Neumann architecture). ... Design of the Von Neumann architecture For the robotic architecture also named after Von Neumann, see Von Neumann machine The von Neumann architecture is a computer design model that uses a single storage structure to hold both instructions and data. ... Parallel computing is the simultaneous execution of the same task (split up and specially adapted) on multiple processors in order to obtain results faster. ... Basic five-stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back) An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput (the number of instructions that... Simple superscalar pipeline. ... In computer engineering, out-of-order execution, OoOE, is a paradigm used in most high-performance microprocessors in order to make use of cycles that would otherwise be wasted by a certain type of costly delay. ... In computer engineering, register renaming refers to a technique used to avoid unnecessary serialization of program operations imposed by the reuse of registers by those operations. ... In computer science, speculative execution is the execution of code whose result may not actually be needed. ... Multithreading computers have hardware support to efficiently execute multiple threads. ... Multiprocessing is traditionally known as the use of multiple concurrent processes in a system as opposed to a single process at any one instant. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ... A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ... Processor board of a CRAY YMP vector computer A vector processor, or array processor, is a CPU design that is able to run mathematical operations on multiple data elements simultaneously. ... -1... 32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32-bit chunks. ... In computing, a 64-bit component is one in which data are processed or stored in 64-bit units (words). ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... This article does not cite any references or sources. ... An Altera Stratix II GX FPGA. A field-programmable gate array is a semiconductor device containing programmable logic components called logic blocks, and programmable interconnects. ... A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ... It has been suggested that this article or section be merged with embedded microprocessor. ... Application Specific Instruction-Set Processor or (ASIP) is a methodology used in System-on-a-Chip design. ... System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. ... Power management is a feature of some electrical appliances, especially copiers and computer peripherals such as monitors and printers, that turns off the power or switches the system to a low-power state after a period of inactivity. ... For the computer architecture technique to increase processor performance by increasing clock frequency, see frequency scaling. ... Dynamic voltage scaling is a technique in computer architecture where a processor is run at a less-than-maximum voltage in order to conserve power. ... Clock gating is one of the power-saving techniques used on the Pentium 4 processor. ...

See also

Addressing modes, a concept from computer science, are an aspect of the instruction set architecture in most central processing unit (CPU) designs. ... A complex instruction set computer (CISC) is a microprocessor instruction set architecture (ISA) in which each instruction can execute several low-level operations, such as a load from memory, an arithmetic operation, and a memory store, all in a single instruction. ... In computer architecture, a bus is a subsystem that transfers data or power between computer components inside a computer or between computers and typically is controlled by device driver software. ... Computer engineering encompasses broad areas of both electrical engineering and computer science. ... A fan blowing at a CPU heatsink. ... The CPU core voltage (VCore) is the power supply voltage supplied to the CPU (which is a digital circuit). ... CPU design is the hardware design of a central processing unit. ... CPUs (Central processing units) in their various incarnations consume some amount of electric power. ... The Socket 370 processor socket, a ZIF type PGA socket A CPU socket or CPU slot is a connector on a computers motherboard that accepts a CPU and forms an electrical interface with it. ... A floating point unit (FPU) is a part of a computer system specially designed to carry out operations on floating point numbers. ... Basic five-stage pipeline in a RISC machine (IF = Instruction Fetch, ID = Instruction Decode, EX = Execute, MEM = Memory access, WB = Register write back) An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput (the number of instructions that... An instruction set is (a list of) all instructions, and all their variations, that a processor can execute. ... CPU architectures are subject to market competition. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond. ... In computer science, hierarchical protection domains, often called protection rings, are a mechanism to protect data and functionality from faults (fault tolerance) and malicious behaviour (computer security). ... For other uses, see Event Stream Processing. ...

Notes

  1. ^ While EDVAC was designed a few years before ENIAC was built, ENIAC was actually retrofitted to execute stored programs in 1948, somewhat before EDVAC was completed. Therefore, ENIAC became a stored program computer before EDVAC was completed, even though stored program capabilities were originally omitted from ENIAC's design due to cost and schedule concerns.
  2. ^ Vacuum tubes eventually stop functioning in the course of normal operation due to the slow contamination of their cathodes that occurs when the tubes are in use. Additionally, sometimes the tube's vacuum seal can form a leak, which accelerates the cathode contamination. See vacuum tube.
  3. ^ Since the program counter counts memory addresses and not instructions, it is incremented by the number of memory units that the instruction word contains. In the case of simple fixed-length instruction word ISAs, this is always the same number. For example, a fixed-length 32-bit instruction word ISA that uses 8-bit memory words would always increment the PC by 4 (except in the case of jumps). ISAs that use variable length instruction words, such as x86, increment the PC by the number of memory words corresponding to the last instruction's length. Also, note that in more complex CPUs, incrementing the PC does not necessarily occur at the end of instruction execution. This is especially the case in heavily pipelined and superscalar architectures (see the relevant sections below).
  4. ^ Because the instruction set architecture of a CPU is fundamental to its interface and usage, it is often used as a classification of the "type" of CPU. For example, a "PowerPC CPU" uses some variant of the PowerPC ISA. A system can execute a different ISA by running an emulator.
  5. ^ Some early computers like the Harvard Mark I did not support any kind of "jump" instruction, effectively limiting the complexity of the programs they could run. It is largely for this reason that these computers are often not considered to contain a CPU proper, despite their close similarity as stored program computers.
  6. ^ This description is, in fact, a simplified view even of the Classic RISC pipeline. It largely ignores the important role of CPU cache, and therefore the access stage of the pipeline. See the respective articles for more details.
  7. ^ The physical concept of voltage is an analog one by its nature, practically having an infinite range of possible values. For the purpose of physical representation of binary numbers, set ranges of voltages are defined as one or zero. These ranges are usually influenced by the circuit designs and operational parameters of the switching elements used to create the CPU, such as a transistor's threshold level.
  8. ^ While a CPU's integer size sets a limit on integer ranges, this can (and often is) overcome using a combination of software and hardware techniques. By using additional memory, software can represent integers many magnitudes larger than the CPU can. Sometimes the CPU's ISA will even facilitate operations on integers larger than it can natively represent by providing instructions to make large integer arithmetic relatively quick. While this method of dealing with large integers is somewhat slower than utilizing a CPU with higher integer size, it is a reasonable trade-off in cases where natively supporting the full integer range needed would be cost-prohibitive. See Arbitrary-precision arithmetic for more details on purely software-supported arbitrary-sized integers.
  9. ^ In fact, all synchronous CPUs use a combination of sequential logic and combinatorial logic. (See boolean logic)
  10. ^ One notable late CPU design that uses clock gating is that of the IBM PowerPC-based Xbox 360. It utilizes extensive clock gating in order to reduce the power requirements of the aforementioned videogame console it is used in. (Brown 2005)
  11. ^ Neither ILP nor TLP is inherently superior over the other; they are simply different means by which to increase CPU parallelism. As such, they both have advantages and disadvantages, which are often determined by the type of software that the processor is intended to run. High-TLP CPUs are often used in applications that lend themselves well to being split up into numerous smaller applications, so-called "embarrassingly parallel problems." Frequently, a computational problem that can be solved quickly with high TLP design strategies like SMP take significantly more time on high ILP devices like superscalar CPUs, and vice versa.
  12. ^ Best-case scenario (or peak) IPC rates in very superscalar architectures are difficult to maintain since it is impossible to keep the instruction pipeline filled all the time. Therefore, in highly superscalar CPUs, average sustained IPC is often discussed rather than peak IPC.
  13. ^ Earlier the term scalar was used to compare the IPC (instructions per cycle) count afforded by various ILP methods. Here the term is used in the strictly mathematical sense to contrast with vectors. See scalar (mathematics) and vector (spatial).
  14. ^ Although SSE/SSE2/SSE3 have superseded MMX in Intel's general purpose CPUs, later IA-32 designs still support MMX. This is usually accomplished by providing most of the MMX functionality with the same hardware that supports the much more expansive SSE instruction sets.

Structure of a vacuum tube diode Structure of a vacuum tube triode In electronics, a vacuum tube, electron tube, or (outside North America) thermionic valve or just valve, is a device used to amplify, switch or modify a signal by controlling the movement of electrons in an evacuated space. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... PowerPC is a RISC microprocessor architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. Originally intended for personal computers, PowerPC CPUs have since become popular embedded and high-performance processors as well. ... This article is about emulators in computer science. ... Portion of the Harvard-IBM Mark 1, left side. ... In history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. ... Diagram of a CPU memory cache A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. ... International safety symbol Caution, risk of electric shock (ISO 3864), colloquially known as high voltage symbol. ... Assorted discrete transistors A transistor is a semiconductor device, commonly used as an amplifier or an electrically controlled switch. ... On a computer, arbitrary-precision arithmetic, also called bignum arithmetic, is a technique that allows computer programs to perform calculations on integers or rational numbers (including floating-point numbers) with an arbitrary number of digits of precision, typically limited only by the available memory of the host system. ... In digital circuit theory, sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. ... This article is not about combinatory logic, a topic in mathematical logic. ... Boolean logic is a complete system for logical operations. ... PowerPC is a RISC microprocessor architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. Originally intended for personal computers, PowerPC CPUs have since become popular embedded and high-performance processors as well. ... It has been suggested that Xbox 360 Elite be merged into this article or section. ... Instruction-level parallelism (ILP) is a measure of how many of the operations in a computer program can be dealt with at once. ... Thread-level parallelism (TLP) is the parallelism inherent in an application that runs multiple threads at once. ... In the jargon of parallel computing, an embarrassingly parallel workload (or embarrassingly parallel problem) is one for which no particular effort is needed to segment the problem into a very large number of parallel tasks, and there is no essential dependency (or communication) between those parallel tasks. ... In linear algebra, real numbers are called scalars and relate to vectors in a vector space through the operation of scalar multiplication, in which a vector can be multiplied by a number to produce another vector. ... This article is about vectors that have a particular relation to the spatial coordinates. ... It has been suggested that this article or section be merged with X86 assembly language. ...

References

Gene Myron Amdahl (born November 16, 1922) is a Norwegian American computer architect and hi-tech entrepreneur, chiefly known for his work on mainframe computers at International Business Machines (IBM) and later his own companies, especially Amdahl Corporation. ... Year 2005 (MMV) was a common year starting on Saturday (link displays full calendar) of the Gregorian calendar. ... December 17 is the 351st day of the year (352nd in leap years) in the Gregorian calendar. ... Year 2007 (MMVII) was a common year starting on Monday of the Gregorian calendar in the 21st century. ... is the 279th day of the year (280th in leap years) in the Gregorian calendar. ... Digital Equipment Corporation was a pioneering American company in the computer industry. ... Affiliations: Russell Group, EUA, N8 Group, NWUA, Worldwide Universities Network (WUN), Association of Commonwealth Universities Website: http://www. ... MIPS Technologies, formerly MIPS Computer Systems, is most widely known for developing the MIPS architecture and a series of pioneering RISC CPUs. ... Year 2005 (MMV) was a common year starting on Saturday (link displays full calendar) of the Gregorian calendar. ... is the 353rd day of the year (354th in leap years) in the Gregorian calendar. ... For other persons named John Neumann, see John Neumann (disambiguation). ... This article is about the private Ivy League university in Philadelphia. ... The US Army Ballistics Research Labatory is at Aberdeen Proving Ground, Aberdeen, Maryland. ...

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[email protected] Image File history File links Central_Processing_Unit_(Part_1). ... Image File history File links Sound-icon. ... Year 2006 (MMVI) was a common year starting on Sunday of the Gregorian calendar. ... is the 164th day of the year (165th in leap years) in the Gregorian calendar. ... AMD redirects here. ... x86 or 80x86 is the generic name of a microprocessor architecture first developed and manufactured by Intel. ... The entrance to ARMs headquarters in Cherry Hinton, Cambridge ARM (Advanced RISC Machines) Ltd is a microprocessor design company headquartered in England, founded in 1990 by Hermann Hauser. ... The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. ... Motorola Inc. ... Freescale sign Freescale Semiconductor, Inc. ... System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. ... For other uses, see IBM (disambiguation) and Big Blue. ... POWER is a RISC instruction set architecture designed by IBM. The name is a acronym for Performance Optimization With Enhanced RISC. POWER is also the name of a series of microprocessors that implements the instruction set architecture. ... PowerPC is a RISC microprocessor architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM. Originally intended for personal computers, PowerPC CPUs have since become popular embedded and high-performance processors as well. ... Game console redirects here. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... It has been suggested that this article or section be merged with X86 assembly language. ... In computing, IA-64 (short for Intel Architecture-64) is a 64-bit processor architecture developed cooperatively by Intel Corporation and Hewlett-Packard (HP), and implemented in the Itanium and Itanium 2 processors. ... The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ... MIPS Technologies, formerly MIPS Computer Systems, is most widely known for developing the MIPS architecture and a series of pioneering RISC CPUs. ... A MIPS R4400 microprocessor made by Toshiba. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... Sun Microsystems, Inc. ... Sun UltraSPARC II Microprocessor Sun UltraSPARC T1 (Niagara 8 Core) SPARC (Scalable Processor Architecture) is a RISC microprocessor instruction set architecture originally designed in 1985 by Sun Microsystems. ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... Transmeta NASDAQ: TMTA develops computing technologies with a focus on reducing power consumption in electronic devices. ... Crusoe is a family of x86-compatible microprocessors from Transmeta. ... The Efficeon processor is Transmetas second-generation 256-bit VLIW design which employs a software engine to convert code written for x86 processors to the native instruction set of the chip (Code Morphing Software, aka CMS). ...


  Results from FactBites:
 
Central processing unit (132 words)
CPU is the control center of the entire computer system.
This unit is sometimes referred to as the microprocessor unit (MPU) in a microcomputer and the central processing unit (CPU) in larger computer systems.
The CPU or MPU is composed of an arithmetic logic unit (ALU) and a control unit (CU).
Central Processing Unit - MSN Encarta (562 words)
A CPU is generally a single microprocessor made from a wafer of semiconducting material, usually silicon, with millions of electrical components on its surface.
On a higher level, the CPU is actually a number of interconnected processing units that are each responsible for one aspect of the CPU’s function.
During this process, a unit called the program counter keeps track of each successive instruction to make sure that the program instructions are followed by the CPU in the correct order.
  More results at FactBites »

 
 

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