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Encyclopedia > Blackfin

Blackfin refers to a family of 16/32-bit microprocessors with built-in Digital Signal Processor (DSP) functionality, which is traditionally only accompanied by a small and power-efficient microcontroller. The result is a low-power, unified processor architecture that can run operating systems while simultaneously handling complex numeric tasks such as real time H.264 video encoding. Blackfin may refer to: Blackfin, a family of embedded DSP microprocessors. ... Image File history File links No higher resolution available. ... A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ... It has been suggested that this article or section be merged with embedded microprocessor. ... H.264, or MPEG-4 Part 10, is a high compression digital video codec standard written by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) as the product of a collective partnership effort known as the Joint Video Team (JVT). ...


The processors come in several varieties of hardware development kits and a community supported Linux port is available. Currently the microprocessor is manufactured by Analog Devices. // μClinux (which stands for MicroController Linux, and is pronounced you-see-linux) is a fork of the Linux kernel for microcontrollers (µCs: see embedded systems) without a memory management unit (MMU). ... A microprocessor is a programmable digital electronic component that incorporates the functions of a central processing unit (CPU) on a single semiconducting integrated circuit (IC). ... Analog Devices (NYSE: ADI) is an American multinational producer of semiconductor devices. ...

Contents

Architecture Details

Blackfin processors use a 32-bit RISC MCU programming model on a SIMD architecture, which was co-developed by Intel and Analog Devices, as MSA (Micro Signal Architecture). 32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32-bit chunks. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... A microcontroller is a computer-on-a-chip optimised to control devices. ... -1... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Analog Devices (NYSE: ADI) is an American multinational producer of semiconductor devices. ...


The Blackfin processor architecture was announced in December, 2000 and first demonstrated at the Embedded Systems Conference in June, 2001.


The Blackfin architectures takes the best of ADI's older SHARC architecture, and the best of Intel's Xscale architecture and puts them into a single core, combining Digital Signal Processing (DSP) and micro-controller functionality. There are many differences in the core architecture between Blackfin/MSA and Xscale/ARM or SHARC, but the combination provides improvements in performance, programmability and power consumption over traditional DSP or RISC architecture designs. The Super Harvard Architecture Single-Chip Computer (SHARC) is a high performance floating-point and fixed-point RISC DSP from Analog Devices. ... The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ...


The Blackfin architecture encompasses a number of different models of CPU, each with advantages for particular applications. The Blackfin family is summarized in the following table.


Analog Devices keeps a comprehensive list of products at this location: [1]

Processor
ADSP-
Max. Clock
(MHz)
Cores Instr L1 SRAM/
(Cache)
(KB)
Data L1 SRAM/
(Cache)
scratch
(KB)
L2 SRAM
(KB)
On-
chip
Flash
Host Port Code Security Ether-
net
MAC
SD/
SDIO
16-bit PPIs 18/24-bit PPIs SDRAM USB ATAPI CAN I²C (TWI) SPI UART SPORT GPIO MXVR
BF5221 600 1 64 (16) 64 (32)
4
- - Yes Yes - - 1 0 SDR
x16
- - - 1 1 2 2 48 pins -
BF5251 600 1 64 (16) 64 (32)
4
- - Yes Yes - - 1 0 SDR
x16
2.0
OTG
- - 1 1 2 2 48 pins -
BF5271 600 1 64 (16) 64 (32)
4
- - Yes Yes 1 - 1 0 SDR
x16
2.0
OTG
- - 1 1 2 2 48 pins -
BF542 600 1 64 (16) 64 (32)
4
- - - Yes - 1 1 0 DDR
x16
1 1 1 1 2 3 3 152 pins -
BF544 533 1 64 (16) 64 (32)
4
64 - Yes Yes - - 1 1 DDR
x16
- - 2 2 2 3 3 152 pins -
BF548 600 1 64 (16) 64 (32)
4
128 - Yes Yes - 1 1 1 DDR
x16
2.0
OTG
1 2 2 3 4 4 152 pins -
BF549 533 1 64 (16) 64 (32)
4
128 - Yes Yes - 1 1 1 DDR
x16
2.0
OTG
1 2 2 3 4 4 152 pins 1
BF531 400 1 32 (16) 16 (16)
4
- - - - - - 1 - SDR
x16
- - - - 1 1 2 16 -
BF532 400 1 48 (16) 32 (32)
4
- - - - - - 1 - SDR
x16
- - - - 1 1 2 16 -
BF533 600 1 80 (16) 64 (32)
4
- - - - - - 1 - SDR
x16
- - - - 1 1 2 16 -
BF534 500 1 64 (16) 64 (32)
4
- - - - - - 1 - SDR
x16
- - 1 1 1 1 2 48 -
BF536 500 1 64 (16) 32 (32)
4
- - - - 1 - 1 - SDR
x16
- - 1 1 1 1 2 48 -
BF537 600 1 64 (16) 64 (32)
4
- - - - 1 - 1 - SDR
x16
- - 1 1 1 1 2 48 -
BF538 500 1 80 (16) 64 (32)
4
- - - - - - 1 - SDR
x16
- - 1 2 3 3 4 54 -
BF538F 500 1 80 (16) 64 (32)
4
- 512
1024
- - - - 1 - SDR
x16
- - 1 2 3 3 4 54 -
BF539 500 1 80 (16) 64 (32)
4
- - - - - - 1 - SDR
x16
- - 1 2 3 3 4 38 1
BF539F 500 1 80 (16) 64 (32)
4
- 512
1024
- - - - 1 - SDR
x16
- - 1 2 3 3 4 38 1
BF561 600 2 64 (16)
per core
64 (32)
4
per core
128 - - - - - 2 - SDR
x32
- - - - 1 1 2 48 -
BF535 350 1 16 32
4
256 - - - - - - - SDR
x16
1.1 - - - 2 2 2 16 -

1 The BF52xC family includes an embedded 48KHz, stereo audio CODEC (2xADCs, 2xDACs). The Parallel Peripheral Interface (PPI) is a peripheral found on the Blackfin embedded processor. ... The Parallel Peripheral Interface (PPI) is a peripheral found on the Blackfin embedded processor. ... SDRAM means synchronous dynamic random access memory which is a type of solid state computer memory. ... Note: USB may also mean upper sideband in radio. ... ATA cables: 40 wire ribbon cable top, 80 wire ribbon cable bottom Advanced Technology Attachment (ATA), is a standard interface for connecting storage devices such as hard disks and CD-ROM drives inside personal computers. ... Controller Area Network (CAN) is a broadcast, differential serial bus standard, originally developed in the 1980s by Robert Bosch GmbH, for connecting electronic control units (ECUs). ... I²C is a multi-master serial computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, or cellphone. ... The Serial Peripheral Interface Bus or SPI (often pronounced es-pē-ī [IPA: ɛs pi aɪ] or spy [IPA: spaɪ]) bus is a synchronous serial data link standard named by Motorola that operates in full duplex mode. ... A UART or universal asynchronous receiver-transmitter is a piece of computer hardware that translates between parallel bits of data and serial bits. ... MOST (an acronym for Media Oriented Systems Transport) is a networking standard intended for interconnecting multimedia components in automobiles and other vehicles. ... A codec is a device or program capable of performing encoding and decoding on a digital data stream or signal. ...


In addition to the features in the table above, all Blackfin processors have the following peripherals

  • Debug/JTAG Interface for in-system debugging
  • Real-time clock
  • Internal core voltage switching regulator
  • Watchdog timer
  • Timers/PWM outputs/PWM capture ports
  • Core timer (runs at core clock speed)

JTAG, an acronym for Joint Test Action Group, is the usual name used for the IEEE 1149. ...

Architecture Features

Core Features

The heart of the Blackfin depends on the person looking at it.

  • For some, it is a DSP. It combines two 16-bit hardware MACs, two 40-bit ALUs, and a 40-bit barrel shifter. This allows the processor to execute up to three instructions per clock cycle, depending on the level of optimization of the compiler (or of the programmer).
  • For others, it is yet another RISC core. It includes memory protection, different operating modes (user, kernel), single-cycle opcodes, data and instruction caches, and instructions for bit test, byte, word, or integer accesses and a variety of on-chip peripherals.

The ISA also features a high level of expressiveness, allowing the assembly programmer (or compiler) to highly optimize an algorithm to the hardware features present. A digital signal processor (DSP) is a specialized microprocessor designed specifically for digital signal processing, generally in real-time. ... The multiply-accumulate operation computes a product and adds it to an accumulator. ... A typical schematic symbol for an ALU: A & B are operands; R is the output; F is the input from the Control Unit; D is an output status In computing, an arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations. ... A barrel shifter is a digital circuit that can shift a data word by any number of bits in a single cycle. ... Compiler optimization is the process of tuning the output of a compiler to minimize some attribute (or maximize the efficiency) of an executable program. ... A diagram of the operation of a typical multi-language, multi-target compiler. ... A programmer or software developer is someone who programs computers, that is, one who writes computer software. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... An instruction set, or instruction set architecture (ISA), describes the aspects of a computer architecture visible to a programmer, including the native datatypes, instructions, registers, addressing modes, memory architecture, interrupt and exception handling, and external I/O (if any). ...


Memory and DMA

The Blackfin uses a byte-addressable, flat memory map. Internal L1 memory, internal L2 memory, external memory and all memory-mapped control registers all reside in this 32-bit address space.


The L1 internal SRAM memory, which runs at the core-clock speed of the device, is based on a Harvard Architecture. Instruction memory and data memory are independent and connect to the core via dedicated memory buses which allows for high sustained data rates between the core and L1 memory. The term Harvard architecture originally referred to computer architectures that used physically separate storage and signal pathways for their instructions and data (in contrast to the von Neumann architecture). ...


Portions of instruction and data L1 SRAM can be optionally configured as cache (independently).


Certain Blackfin processors also have between 64KB and 256KB of L2 memory. This memory runs slower than the core clock speed. Code and data can be mixed in L2.


Blackfin processors support a variety of external memories including SDRAM, DDR-SDRAM, NOR FLASH, NAND FLASH and SRAM. Some Blackfin also include mass-storage interfaces such as ATAPI, and SD/SDIO. They can support hundreds of megabytes of memory in the external memory space.


Coupled with the significant core and memory system is a DMA engine that can operate between any of its peripherals and main (or external) memory. The processors typically have a dedicated DMA channel for each peripheral, which enables very high throughput for applications that can take advantage of it such as real-time standard-definition (D1) video encoding and decoding. Direct memory access (DMA) is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory for reading and/or writing independently of the central processing unit. ... It has been suggested that this article or section be merged into Computer hardware. ... In communication networks, throughput is the amount of digital data per time unit that is delivered over a physical or logical link, or that is passing through a certain network node. ...


Micro-controller Features

The Blackfin architecture contains a number of attributes commonly found on microprocessors and micro-controllers. These features allow Blackfin to efficiently and securely run many commercial and open-source operating systems.

  • Memory Protection Unit : All Blackfin processors contain a Memory Protection Unit (MPU). The MPU provides protection and caching strategies across the entire memory space. The MPU allows Blackfin to support many full-featured operating systems, RTOSs and kernels like ThreadX, µC/OS-II, or (noMMU) Linux. The Blackfin MPU does not provide address translation like a traditional Memory Management Units (MMU) thus it does not support virtual memory or separate memory addresses per process. This is why Blackfin currently can not support operating systems requiring virtual memory such as WinCE or QNX. Just to confuse everyone, in most of the Blackfin documentation, the MPU is referred to as a MMU.
  • User/Supervisor Modes : Blackfin supports three run-time modes : supervisor, user and emulation. In supervisor mode, all processor resources are accessible from the running process. However, when in user mode, system resources and regions of memory can be protected (with the help of the MPU). In a modern operating system or RTOS, the kernel typically runs in supervisor mode and threads/processes will run in user mode. If a thread crashes or attempts to access a protected resource (memory, peripheral, etc) an exception will be thrown and the kernel will then be able to shut down the offending thread/process.
  • Variable-Length, RISC-Like Instruction Set : Blackfin supports 16, 32 and 64-bit instructions. Commonly-used control instructions are encoded as 16-bit opcodes while complex DSP and mathematically intensive functions are encoded as 32 and 64-bit opcodes. This variable length opcode encoding allows Blackfin to achieve good code density equivalent to modern micro-processor architectures.

This 68451 MMU could be used with the Motorola 68010 MMU, short for memory management unit or sometimes called paged memory management unit as PMMU, is a class of computer hardware components responsible for handling memory accesses requested by the CPU. Among the functions of such devices are the translation... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ...

Media Processing Features

The Blackfin instruction set contains media processing extensions to help accelerate pixel processing operations commonly used in video and image compression/decompression algorithms.


Peripherals

Blackfin processors contain a wide array of connectivity peripherals.

  • USB 2.0 OTG (On-The-Go)
  • ATAPI
  • MXVR : a MOST (Media Oriented Systems Transport) Network Interface Controller. MOST is a registered trademark of SMSC.
  • PPI (Parallel Peripheral Interface) : A parallel input/output port that can be used to connect to LCDs, video encoders (video DACs), video decoders (video ADCs), CMOS sensors, CCDs and generic, parallel, high-speed devices. The PPI can run up to 65MHz and can be configured from 8 to 16-bits wide.
  • SPORT : A synchronous, high speed serial port that can support TDM, I2S and a number of other configurable framing modes for connection to ADCs, DACs, other processors, FPGAs, etc.
  • CAN : A wide-area, low-speed serial bus that is fairly popular in automotive and industrial electronics.
  • UART (Universal Asynchronous Receiver Transmitter) : allows for bi-directional communication with RS232 devices (PCs, modems, PC peripherals, etc), MIDI devices, IRDA devices.
  • SPI : A staple of (relatively) high-speed embedded electronics.
  • I²C (also known as TWI (two-wire interface)) : A lower speed, shared serial bus.

Because all of the peripheral control registers are memory-mapped in the normal address space, they are quite easy to set-up. USB OTG Logo USB On-The-Go, normally abbreviated USB OTG, is a supplement [1] to the USB 2. ... ATA cables: 40 wire ribbon cable top, 80 wire ribbon cable bottom Advanced Technology Attachment (ATA), is a standard interface for connecting storage devices such as hard disks and CD-ROM drives inside personal computers. ... MOST (an acronym for Media Oriented Systems Transport) is a networking standard intended for interconnecting multimedia components in automobiles and other vehicles. ... The Parallel Peripheral Interface (PPI) is a peripheral found on the Blackfin embedded processor. ... Controller Area Network (CAN) is a broadcast, differential serial bus standard, originally developed in the 1980s by Robert Bosch GmbH, for connecting electronic control units (ECUs). ... A UART or universal asynchronous receiver-transmitter is a piece of computer hardware that translates between parallel bits of data and serial bits. ... RS-232 (also referred to as EIA RS-232C or V.24) is a standard for serial binary data interchange between a DTE (Data terminal equipment) and a DCE (Data communication equipment). ... Musical Instrument Digital Interface, or MIDI, is a system designed to transmit information between electronic musical instruments. ... The initials IRDA can refer to various things: In Information Technology and Communications, IrDA refers to Infrared Data Association, a standard for communication between devices (such as computers, PDAs and mobile phones) over short distances using infrared signals. ... The Serial Peripheral Interface Bus or SPI bus is a very loose standard for controlling almost any digital electronics that accepts a clocked serial stream of bits. ... I²C is a multi-master serial computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, or cellphone. ... Memory-mapped I/O (MMIO) and port I/O (also called port-mapped I/O or PMIO) are two complementary methods of performing input/output between the CPU and I/O devices in a computer. ...


Development Tools Software

ADI provides its own software development toolchain, CROSSCORE (VisualDSP++), but other options are also available, such as Green Hills Software's MULTI IDE, the GNU GCC Toolchain for the Blackfin processor family, or National Instruments' LabVIEW Embedded Module. Green Hills Software, headquartered in Santa Barbara, California, USA, is a company that markets operating systems and development tools for embedded systems. ... The GNU Compiler Collection (usually shortened to GCC) is a set of programming language compilers produced by the GNU Project. ...


Freely Available Blackfin Software from ADI

ADI has a variety of free software available for download from their website at [2].


Blackfin Software Development Kits (SDKs)

The Analog Devices Blackfin SDK contains free applications software with source code, utilities information and tools that allow you to develop Blackfin processor based applications. The software can be used as a framework, or as examples of how to use certain aspects and peripherals, in conjunction with an ADI Blackfin processor.


Blackfin Software Modules

ADI offers free audio and video software modules for the Blackfin processor at [3]. Modules are provided as object code (C-callable), documentation and examples which run on ADI's standard Ez-Kit evaluation boards.


It is the user's responsibility to work out the license and royalties with the IP holders. Some modules require IP holder pre-approval before they can obtained (Dolby, DTS, and Microsoft).


Video modules currently include: H.264 BL encoder, H.264 BL decoder, WMV9 decoder, MPEG4 SP encoder, MPEG4 ASP decoder, MPEG2 decoder, JPEG/MJPEG encoder, JPEG/MJPEG decoder. H.264 is a high compression digital video codec standard written by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) as the product of a collective partnership effort known as the Joint Video Team (JVT). ... H.264 is a high compression digital video codec standard written by the ITU-T Video Coding Experts Group (VCEG) together with the ISO/IEC Moving Picture Experts Group (MPEG) as the product of a collective partnership effort known as the Joint Video Team (JVT). ... Windows Media Video (WMV) is a generic name for the set of proprietary streaming video technologies developed by Microsoft. ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... MP2, also known as Musicam, is a short form of MPEG-1 Audio Layer 2 (not MPEG-2), and it is also used as a file extension for files containing audio data of this type. ... JPG redirects here. ... Motion JPEG (M-JPEG) is an informal name for multimedia formats where each video frame or interlaced field of a digital video sequence is separately compressed as a JPEG image. ... JPG redirects here. ... Motion JPEG (M-JPEG) is an informal name for multimedia formats where each video frame or interlaced field of a digital video sequence is separately compressed as a JPEG image. ...


Audio modules currently include: WMA9 decoder, MPEG4 HE-AAC v2 encoder, MPEG4 HE-AAC v2 (with DAB support) decoder, MPEG4 AAC-LC decoder, MPEG4 AAC-BSAC decoder, MP3 encoder, MP3 decoder, DTS Neo6 decoder, DTS 5.1 decoder, Dolby Virtual Speaker (DVS) post processing, Dolby Prologic IIx (DPLIIx) post processing, Dolby Headphone v2, Dolby Digital (AC-3) Consumer encoder, Dolby Digital (AC-3) 5.1 decoder, Asynchronous Sample Rate Converter (ASRC) post processing (version 5.0). Windows Media Audio (WMA) is a proprietary compressed audio file format developed by Microsoft. ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... MPEG-4, introduced in 1998, is the designation for a group of audio and video coding standards agreed upon by the Moving Picture Experts Group (MPEG). ... For other uses, see MP3 (disambiguation). ... For other uses, see MP3 (disambiguation). ... DTS is a three-letter acronym that may refer to: Digital Theater System, a surround sound format for synchronized film sound DTS Coherent Acoustics, a codec Dispatch, Tracking, and Support System, a web-based computer software program created by Crazed Geeks Consulting Co in Union City, IN to manage drive... DTS is a three-letter acronym that may refer to: Digital Theater System, a surround sound format for synchronized film sound DTS Coherent Acoustics, a codec Dispatch, Tracking, and Support System, a web-based computer software program created by Crazed Geeks Consulting Co in Union City, IN to manage drive... Dolby Laboratories, Incorporated (Dolby Labs) is a company specializing in audio compression and reproduction. ... Dolby Laboratories, Incorporated (Dolby Labs) is a company specializing in audio compression and reproduction. ... Dolby Laboratories, Incorporated (Dolby Labs) is a company specializing in audio compression and reproduction. ... Dolby Laboratories, Incorporated (Dolby Labs) is a company specializing in audio compression and reproduction. ... Dolby Laboratories, Incorporated (Dolby Labs) is a company specializing in audio compression and reproduction. ...


Supported Operating Systems, RTOSs & Kernels

Blackfin supports numerous commercial and open-source operating systems.

OS/RTOS/Kernels on Blackfin
Title Type Home Page Comments
µClinux Distribution Open-Source/GPL http://blackfin.uclinux.org
wiki : http://docs.blackfin.uclinux.org
Integrated into Linux mainline kernel, various applications in userspace
ThreadX Commercial http://www.rtos.com
Nucleus Commercial http://www.mentor.com
Fusion Commercial http://www.unicoi.com/fusion_rtos/rtos_blackfin.htm
µC/OS-II Commercial/Source Available http://www.micrium.com/
velOSity Microkernel Commercial http://www.ghs.com
INTEGRITY Commercial http://www.ghs.com
RTEMS Open-Source/GPL http://www.rtems.com/
T2 SDE Open-Source/GPL http://www.t2-project.org/architectures/blackfin.html
VDK Commercial http://www.analog.com/blackfin ADI's real-time kernel. Ships with VisualDSP++.

// μClinux (which stands for MicroController Linux, and is pronounced you-see-linux) is a fork of the Linux kernel for microcontrollers (µCs: see embedded systems) without a memory management unit (MMU). ... The GNU logo For other uses of GPL, see GPL (disambiguation). ... THreadx is an a RTOS made by Mr. ... Nucleus RTOS is a real-time operating system (RTOS) and full featured toolset created by Accelerated Technology, the Embedded Systems Division of Mentor Graphics for various CPU platforms. ... MicroC/OS-II (commonly termed µC/OS-II or uC/OS-II), is a low-cost priority-based pre-emptive real time multitasking operating system kernel for microprocessors, written mainly in the C programming language. ... INTEGRITY is a real-time operating system (RTOS) produced and marketed by Green Hills Software. ... RTEMS (Real-Time Executive for Multiprocessor Systems) is a free open source real-time operating system designed for embedded systems. ... The GNU logo For other uses of GPL, see GPL (disambiguation). ... T2 is a flexible Open Source System Development Environment (SDE) that allows the automated creation of Operating System with bleeding edge technology. ... The GNU logo For other uses of GPL, see GPL (disambiguation). ...

Devices using Blackfin

  • JXD 301 (Handheld multimedia and games player)

See also

The Super Harvard Architecture Single-Chip Computer (SHARC) is a high performance floating-point and fixed-point RISC DSP from Analog Devices. ... TigerSHARC refers to a family of microprocessors manufactured by Analog Devices Inc (ADI). ...

External links


  Results from FactBites:
 
USS Blackfin (SS-322) - Wikipedia, the free encyclopedia (406 words)
USS Blackfin (SS-322), a Balao-class submarine, was a ship of the United States Navy named for the flfin, a food fish of the Great Lakes.
Blackfin (SS-322) was launched 12 March 1944 by Electric Boat Co., Groton, Conn., sponsored by Mrs.
Blackfin was decommissioned and struck from the Naval Register, 15 September 1972.
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