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Encyclopedia > ARM architecture

The ARM architecture (previously, the Advanced RISC Machine, and prior to that Acorn RISC Machine) is a 32-bit RISC processor architecture developed by ARM Limited that is widely used in a number of embedded designs. Because of their power saving features, ARM CPUs are dominant in the mobile electronics market, where low power consumption is a critical design goal. 32-bit is a term applied to processors, and computer architectures which manipulate the address and data in 32-bit chunks. ... Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ... “CPU” redirects here. ... Image:ARM-Cambridge. ... A router, an example of an embedded system. ... “CPU” redirects here. ... In electrical engineering, power consumption refers to the electrical energy over time that must be supplied to an electrical device to maintain its operation. ...


Today, the ARM family accounts for approximately 75% of all embedded 32-bit RISC CPUs,[1] making it one of the most prolific 32-bit architectures in the world. ARM CPUs are found in all corners of consumer electronics, from portable devices (PDAs, mobile phones, media players, handheld gaming units, and calculators) to computer peripherals (hard drives, desktop routers). Important branches in this family include Marvell's XScale and the Texas Instruments OMAP series. Look up Personal digital assistant in Wiktionary, the free dictionary. ... For other uses, see Calculator (disambiguation). ... Typical hard drives of the mid-1990s. ... This article is about a computer networking device. ... Marvell (NASDAQ: MRVL) is an American producer of storage, communications and consumer semiconductor products. ... The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... OMAP is a Texas Instruments proprietary microprocessor for multimedia applications. ...

Contents

History

A Conexant ARM processor used mainly in routers

The ARM design was started in 1983 as a development project at Acorn Computers Ltd. Image File history File links A Conexant ARM processor File history Legend: (cur) = this is the current file, (del) = delete this old version, (rev) = revert to this old version. ... Image File history File links A Conexant ARM processor File history Legend: (cur) = this is the current file, (del) = delete this old version, (rev) = revert to this old version. ... Please wikify (format) this article or section as suggested in the Guide to layout and the Manual of Style. ... This article is about a computer networking device. ... Year 1983 (MCMLXXXIII) was a common year starting on Saturday (link displays the 1983 Gregorian calendar). ... forever . ...


The team, led by Roger Wilson and Steve Furber, started development of what in some ways resembles an advanced MOS Technology 6502. Acorn had a long line of computers based on the 6502, so a chip that was similar to program could represent a significant advantage for the company. Sophie Wilson, formerly Roger Wilson, is a British computer scientist. ... Stephen Byram Furber was born in Manchester, England, in 1953. ... The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. ... forever . ... The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. ...


The team completed development samples called ARM1 by April 1985[2], and the first "real" production systems as ARM2 the following year. The ARM2 featured a 32-bit data bus, a 26-bit address space giving a 64 Mbyte address range and sixteen 32-bit registers. One of these registers served as the (word aligned) program counter with its top 6 bits and lowest 2 bits holding the processor status flags. The ARM2 was possibly the simplest useful 32-bit microprocessor in the world, with only 30,000 transistors (compare with Motorola's six-year older 68000 model with around 70,000 transistors). Much of this simplicity comes from not having microcode (which represents about one-fourth to one-third of the 68000) and, like most CPUs of the day, not including any cache. This simplicity led to its low power usage, while performing better than the Intel 80286[citation needed]. A successor, ARM3, was produced with a 4KB cache, which further improved performance. This article is about the year. ... In computer architecture, a bus is a subsystem that transfers data or power between computer components inside a computer or between computers. ... In computing, an address space defines a range of discrete addresses, each of which may correspond to a physical or virtual memory register, a network host, peripheral device, disk sector or other logical or physical entity. ... In computer architecture, a processor register is a small amount of very fast computer memory used to speed the execution of computer programs by providing quick access to frequently used values—typically, these values are involved in multiple expression evaluations occurring within a small region on the program. ... The program counter (also called the instruction pointer in some computers) is a register in a computer processor which indicates where the computer is in its instruction sequence. ... In computer programming, flag refers to one or more bits that are used to store a binary value or code that has an assigned meaning. ... Assorted discrete transistors A transistor is a semiconductor device, commonly used as an amplifier or an electrically controlled switch. ... The Motorola 68000 is a 32-bit CISC microprocessor core designed and marketed by Freescale Semiconductor (formerly Motorola Semiconductor Products Sector). ... A microprogram is a program consisting of microcode that controls the different parts of a computers central processing unit (CPU). ... Look up cache in Wiktionary, the free dictionary. ... AMD 80286 at 12 MHz. ...


In the late 1980s Apple Computer started working with Acorn on newer versions of the ARM core. The work was so important that Acorn spun off the design team in 1990 into a new company called Advanced RISC Machines Ltd.. For this reason, ARM is sometimes expanded as Advanced RISC Machine instead of Acorn RISC Machine. Advanced RISC Machines became ARM Ltd when its parent company, ARM Holdings plc, floated on the London Stock Exchange and NASDAQ in 1998.[1] Apple Inc. ... forever . ... forever . ... The entrance to ARMs headquarters in Cherry Hinton, Cambridge ARM (Advanced RISC Machines) Ltd is a microprocessor design company headquartered in England, founded in 1990 by Hermann Hauser. ... forever . ... The entrance to ARMs headquarters in Cherry Hinton, Cambridge ARM (Advanced RISC Machines) Ltd is a microprocessor design company headquartered in England, founded in 1990 by Hermann Hauser. ... The Source by Greyworld, in the new LSE building Paternoster Square. ... NASDAQ in Times Square, New York City. ...


This work would eventually turn into the ARM6. The first models were released in 1991, and Apple used the ARM6-based ARM 610 as the basis for their Apple Newton PDA. In 1994, Acorn used the ARM 610 as the main CPU in their Risc PC computers. It has been suggested that Apple Newton Software be merged into this article or section. ... forever . ... “CPU” redirects here. ... The Risc PC (codenamed Medusa) was Acorn Computers Ltds next generation RISC OS/Acorn RISC Machine computer, launched in 1994, which superseded the Acorn Archimedes. ...


The core has remained largely the same size throughout these changes. ARM2 had 30,000 transistors, while the ARM6 grew to only 35,000. The idea is that the Original Design Manufacturer combines the ARM core with a number of optional parts to produce a complete CPU, one that can be built on old semiconductor fabs and still deliver lots of performance at a low cost. An Original Design Manufacturer (ODM) is a company which manufactures a product which ultimately will be branded by another firm for sale. ... It has been suggested that this article or section be merged into Fabrication plant. ...


ARM's business has always been to sell IP cores, which licensees use to create microcontrollers and CPUs based on this core. The most successful implementation has been the ARM7TDMI with hundreds of millions sold in almost every kind of microcontroller equipped device. In electronic design and electronic design automation an intellectual property block, IP-block or IP core is a unit of reusable design, the use of which has been licensed to a third party. ... A microcontroller is a computer-on-a-chip optimised to control devices. ... CPU can stand for: in computing: Central processing unit in journalism: Commonwealth Press Union in law enforcement: Crime prevention unit in software: Critical patch update, a type of software patch distributed by Oracle Corporation in Macleans College is often known as Ash Lim. ... The ARM7TDMI processor is a 16-bit/32-bit RISC CPU designed by ARM, and licensed for manufacture by an array of semiconductor companies. ...


DEC licensed the architecture (which caused some confusion because they also produced the DEC Alpha) and produced the StrongARM. At 233 MHz this CPU drew only 1 watt of power (more recent versions draw far less). This work was later passed to Intel as a part of a lawsuit settlement, and Intel took the opportunity to supplement their aging i960 line with the StrongARM. Intel later developed its own high performance implementation known as XScale which it has since sold to Marvell. The DEC logo Digital Equipment Corporation was a pioneering American company in the computer industry. ... DEC Alpha AXP 21064 Microprocessor die photo Package for DEC Alpha AXP 21064 Microprocessor Alpha AXP 21064 bare die mounted on a business card with some statistics The DEC Alpha, also known as the Alpha AXP, is a 64-bit RISC microprocessor originally developed and fabricated by Digital Equipment Corp... DEC StrongARM SA-110 Microprocessor The StrongARM microprocessor is a faster version of the Advanced RISC Machines ARM design. ... For other uses, see Watt (disambiguation). ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... Intels i960 (or 80960) was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller, becoming a best-selling CPU in that field, along with the competing AMD 29000. ... The XScale, a microprocessor core, is Intels implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP and PXA (see more below). ... Marvell (NASDAQ: MRVL) is an American producer of storage, communications and consumer semiconductor products. ...


The common architecture supported on smartphones, Personal Digital Assistants and other handheld devices is ARMv4. XScale and ARM926 processors are ARMv5TE, and are now more numerous in high-end devices than the StrongARM, ARM925T and ARM7TDMI based ARMv4 processors[citation needed]. The architecture version is shown in the Arch column below. A smartphone is generally considered any handheld device that integrates personal information management and mobile phone capabilities in the same device. ... Palm IIIxe PDA Personal digital assistants (PDAs or palmtops) are handheld devices that were originally designed as personal organizers, but became much more versatile over the years. ... This article or section reads like an advertisement. ... The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ... DEC StrongARM SA-110 Microprocessor The StrongARM microprocessor is a faster version of the Advanced RISC Machines ARM design. ... The ARM7TDMI processor is a 16-bit/32-bit RISC CPU designed by ARM, and licensed for manufacture by an array of semiconductor companies. ...


The cores

Family Arch Core Feature Cache (I/D)/MMU typical MIPS @ MHz in Application
ARM1 ARMv1 ARM1 None ARM Evaluation System second processor for BBC Micro
ARM2 ARMv2 ARM2 Architecture 2 added the MUL (multiply) instruction None 4 MIPS @ 8MHz Acorn Archimedes, Chessmachine
ARMv2a ARM250 Integrated MEMC (MMU), Graphics and IO processor. Architecture 2a added the SWP and SWPB (swap) instructions. None, MEMC1a 7 MIPS @ 12MHz Acorn Archimedes
ARM3 ARMv2a ARM2a First use of a processor cache on the ARM. 4K unified 12 MIPS @ 25MHz Acorn Archimedes
ARM6 ARMv3 ARM60 v3 architecture first to support addressing 32bits of memory (as opposed to 26bits) None 10 MIPS @ 12MHz 3DO Interactive Multiplayer, Zarlink GPS Receiver
ARM600 Cache and coprocessor bus (for FPA10 floating-point unit). 4K unified 28 MIPS @ 33MHz
ARM610 Cache, no coprocessor bus. 4K unified 17 MIPS @ 20MHz Acorn Risc PC 600, Apple Newton 100 series
ARM7 ARMv3 ARM700 8KB unified 40MHz
ARM710a 8KB unified 40MHz Acorn Risc PC 700, Apple eMate 300
ARM7100 Integrated SoC. 8KB unified 18MHz Psion Series 5
ARM7500 Integrated SoC. 4KB unified 40MHz Acorn A7000
ARM7500FE Integrated SoC. "FE" Added FPA and EDO memory controller. 4KB unified 56MHz Acorn A7000+
ARM7TDMI ARMv4T ARM7TDMI(-S) 3-stage pipeline none 15 MIPS @ 16.8 MHz Game Boy Advance, Nintendo DS, iPod, Lego NXT
ARM710T 8KB unified, MMU 36 MIPS @ 40 MHz Psion Series 5mx
ARM720T 8KB unified, MMU 60 MIPS @ 59.8 MHz Zipit
ARM740T MPU
ARMv5TEJ ARM7EJ-S Jazelle DBX, Enhanced DSP instructions, 5-stage pipeline none
StrongARM ARMv4 SA-110 16KB/16KB 200MHz Apple Newton 2x00 series, Risc PC, Rebel/Corel Netwinder, Chalice CATS, Psion Netbook
ARMv4 SA-1110 16KB/16KB 233MHz LART, Intel Assabet, Ipaq H36x0, Balloon2
ARM9TDMI ARMv4T ARM9TDMI 5-stage pipeline none
ARM920T 16KB/16KB, MMU 200 MIPS @ 180 MHz Armadillo, GP32,GP2X (first core), Tapwave Zodiac (Motorola i. MX1), Hp49g+, Sun SPOT
ARM922T 8KB/8KB, MMU
ARM940T 4KB/4KB, MPU GP2X (second core)
ARM9E ARMv5TE ARM946E-S Enhanced DSP instructions variable, tightly coupled memories, MPU Nintendo DS, Nokia N-Gage Conexant 802.11 chips
ARM966E-S no cache, TCMs

ST Micro STR91xF, includes Ethernet [2] This 68451 MMU could be used with the Motorola 68010 MMU, short for memory management unit or sometimes called paged memory management unit as PMMU, is a class of computer hardware components responsible for handling memory accesses requested by the CPU. Among the functions of such devices are the translation... Million instructions per second (MIPS) is a measure of a computers processor speed. ... A Cheese Wedge for the BBC Microcomputer was a peripheral in a box with the same profile and styling as the main computer. ... The BBC Microcomputer System was a series of microcomputers and associated peripherals designed and built by Acorn Computers Ltd for the BBC Computer Literacy Project operated by the British Broadcasting Corporation. ... This article or section does not cite its references or sources. ... The ChessMachine was a chess computer sold between 1991 and 1995 by TASC (The Advanced Software Company). ... This article or section does not cite its references or sources. ... This article or section does not cite its references or sources. ... 3DO Interactive Multiplayer (most commonly referred to as the 3DO) is a line of video game consoles which were released in 1993 and 1994 by Panasonic, Sanyo and Goldstar, among other companies. ... The Risc PC (codenamed Medusa) was Acorn Computers Ltds next generation RISC OS/Acorn RISC Machine computer, launched in 1994, which superseded the Acorn Archimedes. ... It has been suggested that Apple Newton Software be merged into this article or section. ... The Risc PC (codenamed Medusa) was Acorn Computers Ltds next generation RISC OS/Acorn RISC Machine computer, launched in 1994, which superseded the Acorn Archimedes. ... Apple Newton eMate 300 open. ... A Psion Series 5mx PRO German Edition The Psion 5 is a PDA from Psion. ... The ARM7TDMI processor is a 16-bit/32-bit RISC CPU designed by ARM, and licensed for manufacture by an array of semiconductor companies. ... “GBA” redirects here. ... “NDS” redirects here. ... iPod is a brand of portable media player designed and marketed by Apple and launched in October 2001. ... This article is being considered for deletion in accordance with Wikipedias deletion policy. ... A Psion Series 5mx PRO German Edition The Psion 5 is a PDA from Psion. ... The Zipit Wireless Messenger is a small clamshell device that enables Instant Messaging (AOL, Yahoo, Microsoft) while on 802. ... DEC StrongARM SA-110 Microprocessor The StrongARM microprocessor is a faster version of the Advanced RISC Machines ARM design. ... LART can refer to: Los Angeles Rapid Transit Luser Attitude Readjustment Tool (Jargon File) Local Abuse Response Team Categories: | ... iPAQ presently refers to a Pocket PC and personal digital assistant first unveiled by Compaq in April 2000; the name was borrowed from Compaqs earlier iPAQ Desktop Personal Computers. ... The GP32 (GamePark 32) is a hand held console built by the Korean company Game Park. ... The GP2X is an open-source, Linux-based handheld video game console and media player created and sold by GamePark Holdings of South Korea. ... The Tapwave Zodiac 2 The Tapwave Zodiac is a Palm OS 5-based PDA created by the US company Tapwave, and the first Palm-based device developed with gaming and multimedia as primary considerations. ... Motorola Inc. ... HP 49G graphing calculator The HP 49G series are Hewlett-Packard (HP) manufactured graphing calculators. ... Sun SPOT (Sun Small Programmable Object Technology) is a wireless sensor network (WSN) mote (an electronic communication device meant to be the size of a particle of dust) developed by Sun Microsystems. ... The GP2X is an open-source, Linux-based handheld video game console and media player created and sold by GamePark Holdings of South Korea. ... ARM9E is an ARM architecture 32-bit RISC CPU family. ... “NDS” redirects here. ... This article is about the telecommunications corporation. ... This article is about the hand-held telephone. ...

ARM968E-S no cache, TCMs
ARMv5TEJ ARM926EJ-S Jazelle DBX, Enhanced DSP instructions variable, TCMs, MMU 220 MIPS @ 200 MHz, Mobile phones: Sony Ericsson (K, W series),Siemens and Benq (x65 series and newer), Texas Instruments OMAP1710, Qualcomm MSM6100, MSM6125, MSM6225, MSM6245, MSM6250, MSM6255A, MSM6260, MSM6275, MSM6280, MSM6300, MSM6500, MSM6800
ARMv5TE ARM996HS Clockless processor, Enhanced DSP instructions no caches, TCMs, MPU
ARM10E ARMv5TE ARM1020E (VFP), 6-stage pipeline, Enhanced DSP instructions 32KB/32KB, MMU
ARM1022E (VFP) 16KB/16KB, MMU
ARMv5TEJ ARM1026EJ-S Jazelle DBX, Enhanced DSP instructions variable, MMU or MPU
XScale ARMv5TE 80200/IOP310/IOP315 I/O Processor, Enhanced DSP instructions
80219 400/600MHz Thecus N2100
IOP321 600 BogoMips @ 600 MHz Iyonix
IOP33x
IOP34x 1-2 core, RAID Acceleration 32K/32K L1, 512K L2, MMU
PXA210/PXA250 Applications processor, 7-stage pipeline Zaurus SL-5600, iPAQ H3900
PXA255 32KB/32KB, MMU 400 BogoMips @ 400 MHz Gumstix, Palm Tungsten E2,Mentor Ranger & Stryder
PXA26x default 400 MHz, up to 624 MHz Palm Tungsten T3
PXA27x 800 MIPS @ 624 MHz HTC Universal, Zaurus SL-C1000,3000,3100,3200, Dell Axim x30, x50, and x51 series, Motorola Q, Balloon3
PXA800(E)F
Monahans 1000 MIPS @ 1.25 GHz
PXA900 Blackberry 8700, Blackberry Pearl (8100)
IXC1100 Control Plane Processor
IXP2400/IXP2800
IXP2850
IXP2325/IXP2350
IXP42x NSLU2
IXP460/IXP465
ARM11 ARMv6 ARM1136J(F)-S SIMD, Jazelle DBX, (VFP), 8-stage pipeline variable, MMU 740 @ 532-665MHz (i.MX31 SoC), 400-528Mhz Nokia N95, Nokia N93, Zune, Nokia N800, Texas Instruments OMAP2, HTC TyTN II (Kaiser), HTC Nike, Qualcomm MSM7200 (Integrated ARM926EJ-S Coprocessor@274Mhz)
ARMv6T2 ARM1156T2(F)-S SIMD, Thumb-2, (VFP), 9-stage pipeline variable, MPU
ARMv6KZ ARM1176JZ(F)-S SIMD, Jazelle DBX, (VFP) variable, MMU+TrustZone Apple iPhone,Conexant CX2427X, Motorola RIZR Z8
ARMv6K ARM11 MPCore 1-4 core SMP, SIMD, Jazelle DBX, (VFP) variable, MMU
Cortex ARMv7-A Cortex-A8 Application profile, VFP, NEON, Jazelle RCT, Thumb-2, 13-stage pipeline variable (L1+L2), MMU+TrustZone up to 2000 (2.0 DMIPS/MHz in speed from 600 MHz to greater than 1 GHz) Texas Instruments OMAP3
ARMv7-R Cortex-R4(F) Embedded profile, (FPU) variable cache, MPU optional 600 DMIPS Broadcom is a user
ARMv7-M Cortex-M3 Microcontroller profile, Thumb-2 only. no cache, (MPU) 125 DMIPS @ 100MHz Luminary Micro[3] microcontroller family, ST Microelectronics STM32[4]
ARMv6-M Cortex-M1 FPGA targeted, Microcontroller profile, Thumb-2 (BL, MRS, MSR, ISB, DSB, and DMB). None, tightly coupled memory optional. Up to 136 DMIPS @ 170MHz[3] (0.8 DMIPS/MHz[4], MHz achievable FPGA-dependent) "Actel ProASIC3 and Actel Fusion PSC devices will sample in Q3 2007"[5]

For an arrangement of Sony Ericsson products, see list of Sony Ericsson products Sony Ericsson is a joint venture established in 2001 by the Japanese consumer electronics company Sony Corporation and the Swedish telecommunications company Ericsson to make mobile phones. ... “Siemens” redirects here. ... BenQ Corporation (IPA: ; Chinese: ) is a Taiwanese company specializing in the manufacturing of computing, communications, and consumer electronics devices. ... OMAP is a Texas Instruments proprietary microprocessor for multimedia applications. ... Qualcomm (NASDAQ: QCOM) is a wireless telecommunications research and development company based in San Diego, California. ... The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ... BogoMips (from bogus and MIPS) is an unscientific measurement of CPU speed made by the Linux kernel when it boots, to calibrate an internal busy-loop. ... The Iyonix PC is an Acorn-clone personal computer from Castle Technology Ltd. ... Sharp Zaurus SL-5500 running OpenZaurus and OPIE, with docking cradle and stylus The Sharp Zaurus is the name of a series of Personal Digital Assistant (PDA) made by Sharp Corporation. ... iPAQ presently refers to a Pocket PC and personal digital assistant first unveiled by Compaq in April 2000; the name was borrowed from Compaqs earlier iPAQ Desktop Personal Computers. ... BogoMips (from bogus and MIPS) is an unscientific measurement of CPU speed made by the Linux kernel when it boots, to calibrate an internal busy-loop. ... To meet Wikipedias quality standards, this article or section may require cleanup. ... Categories: Computer stubs | PDAs ... High Tech Computer Corporation (TSEC: 2498), known by its acronym HTC, is the Taiwan-based manufacturer of Microsoft Windows CE portable devices. ... Sharp Zaurus SL-5500 running OpenZaurus and OPIE, with docking cradle and stylus The Sharp Zaurus is the name of a series of Personal Digital Assistant (PDA) made by Sharp Corporation. ... This article does not cite any references or sources. ... The NSLU2 The NSLU2 is a device made by Linksys for making USB Flash memory or hard disk devices accessible over a network (NAS). ... -1... The Nokia N95 is a smartphone produced by Nokia. ... Nokia N93 (black and silver versions) The Nokia N93 is a smartphone by Nokia especially designed for multimedia use. ... This article is about the digital media brand. ... The Nokia N800 Internet Tablet is a wireless Internet appliance from Nokia, originally announced at the Las Vegas CES 2007 Summit in January 2007. ... OMAP is a Texas Instruments proprietary microprocessor for multimedia applications. ... The HTC TyTN II (P4550/Kaiser) is a 3. ... Qualcomm (NASDAQ: QCOM) is a wireless telecommunications research and development company based in San Diego, California. ... -1... -1... The correct title of this article is . ... Please wikify (format) this article or section as suggested in the Guide to layout and the Manual of Style. ... The Motorola RIZR Z8 (pronounced riser) is a mobile phone from Motorola. ... -1... OMAP is a Texas Instruments proprietary microprocessor for multimedia applications. ... Dhrystone is a synthetic benchmark program developed in 1984 by Reinhold P. Weicker intended to be representative of system (integer) programming. ... Broadcom Corporation is a leading American supplier of integrated circuits (ICs) for broadband communications. ...

Design notes

To keep the design clean, simple and fast, it was hardwired without microcode, like the much simpler 8-bit 6502 processor used in prior Acorn microcomputers. A microprogram is a program consisting of microcode that controls the different parts of a computers central processing unit (CPU). ... The MOS Technology 6502 is an 8-bit microprocessor that was designed by Chuck Peddle for MOS Technology in 1975. ... Acorn Computers Ltd. ...


The ARM architecture includes the following RISC features: Reduced Instruction Set Computer (RISC), is a microprocessor CPU design philosophy that favors a smaller and simpler set of instructions that all take about the same amount of time to execute. ...

  • Load/store architecture
  • No support for misaligned memory accesses (now supported in ARMv6 cores)
  • Orthogonal instruction set
  • Large 16 × 32-bit register file
  • Fixed instruction width of 32 bits to ease decoding and pipelining, at the cost of decreased code density
  • Mostly single-cycle execution

To compensate for the simpler design, compared with contemporary processors like the Intel 80286 and Motorola 68020, some unique design features were used: Orthogonal instruction set is a term used in computer science. ... A register file is an array of processor registers in a central processing unit (CPU). ... AMD 80286 at 12 MHz. ... Motorola 68020 The Motorola 68020 is a microprocessor from Motorola. ...

  • Conditional execution of most instructions, reducing branch overhead and compensating for the lack of a branch predictor
  • Arithmetic instructions alter condition codes only when desired
  • 32-bit barrel shifter which can be used without performance penalty with most arithmetic instructions and address calculations
  • Powerful indexed addressing modes
  • Simple, but fast, 2-priority-level interrupt subsystem with switched register banks

An interesting addition to the ARM design is the use of a 4-bit condition code on the front of every instruction, meaning that execution of every instruction is optionally conditional. In computer architecture, a branch predictor is the part of a processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. ... The Condition Code register, or CCR, is a register which has its bits set or reset when certain conditions are met. ... A barrel shifter is a digital circuit that can shift a data word by any number of bits in a single cycle. ... Addressing modes, a concept from computer science, are an aspect of the instruction set architecture in most central processing unit (CPU) designs. ... In computing, an interrupt is an asynchronous signal from hardware or software indicating the need for attention. ...


This cuts down significantly on the encoding bits available for displacements in memory access instructions, but on the other hand it avoids branch instructions when generating code for small if statements. The standard example of this is the Euclidean algorithm by Euclid: In number theory, the Euclidean algorithm (also called Euclids algorithm) is an algorithm to determine the greatest common divisor (GCD) of two elements of any Euclidean domain (for example, the integers). ... For other uses, see Euclid (disambiguation). ...


In the C programming language, the loop is: C is a general-purpose, block structured, procedural, imperative computer programming language developed in 1972 by Dennis Ritchie at the Bell Telephone Laboratories for use with the Unix operating system. ...

 int gcd (int i, int j) { while (i != j) { if (i > j) i -= j; else j -= i; } return i; } 

In ARM assembly, the loop is: See the terminology section, below, regarding inconsistent use of the terms assembly and assembler. ...

 loop CMP Ri, Rj ; set condition "NE" if (i != j) ; "GT" if (i > j), ; or "LT" if (i < j) SUBGT Ri, Ri, Rj ; if "GT", i = i-j; SUBLT Rj, Rj, Ri ; if "LT", j = j-i; BNE loop ; if "NE", then loop 

which avoids the branches around the then and else clauses.


Another unique feature of the instruction set is the ability to fold shifts and rotates into the "data processing" (arithmetic, logical, and register-register move) instructions, so that, for example, the C statement

a += (j << 2);

could be rendered as a single word, single cycle instruction on the ARM.

ADD Ra, Ra, Rj, LSL #2

This results in the typical ARM program being denser than expected with less memory access; thus the pipeline is used more efficiently. Even though the ARM runs at what many would consider to be low speeds, it nevertheless competes quite well with much more complex CPU designs.


The ARM processor also has some features rarely seen on other RISC architectures, such as PC-relative addressing (indeed, on the ARM the PC is one of its 16 registers) and pre- and post-increment addressing modes.


Another item of note is that the ARM has been around for a while, with the instruction set increasing somewhat over time. Some early ARM processors (prior to ARM7TDMI), for example, have no instruction to load a two-byte quantity, thus, strictly speaking, for them it's not possible to generate code that would behave the way one would expect for C objects of type "volatile short".


The ARM7 and most earlier designs have a three stage pipeline; the stages being fetch, decode, and execute. Higher performance designs, such as the ARM9, have a five stage pipeline. Additional changes for higher performance include a faster adder, and more extensive branch prediction logic.


The architecture provides a non-intrusive way of extending the instruction set using "coprocessors" which can be addressed using MCR, MRC, MRRC and MCRR commands from software. The coprocessor space is divided logically into 16 coprocessors with numbers from 0 to 15, coprocessor 15 (cp15) being reserved for some typical control functions like managing the caches and MMU operation (on processors that have one). This 68451 MMU could be used with the Motorola 68010 MMU, short for memory management unit or sometimes called paged memory management unit as PMMU, is a class of computer hardware components responsible for handling memory accesses requested by the CPU. Among the functions of such devices are the translation...


In ARM based machines, peripheral devices are usually attached to the processor by mapping their physical registers into ARM memory space or into the coprocessor space or connecting to another device (a bus) which in turn attaches to the processor. Coprocessor accesses have lower latency so some peripherals (for example XScale interrupt controller) are designed to be accessible in both ways (through memory and through coprocessors). The XScale, a microprocessor core, is Marvells (formerly Intels) implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP, PXA and CE (see more below). ...


Thumb

Newer ARM processors have a compressed instruction set, called Thumb, that uses a 16-bit-wide instruction encoding (but still processes 32-bit data). In Thumb, the smaller opcodes have less functionality. For example, only branches can be conditional, and many opcodes cannot access all of the CPU's registers. However, the shorter opcodes give improved code density overall, even though some operations require more instructions. Particularly in situations where the memory port or bus width is constrained to less than 32 bits, the shorter Thumb opcodes allows greater performance than with 32-bit code because of the more efficient use of the limited memory bandwidth. Typically embedded hardware has a small range of addresses of 32-bit datapath and the rest are 16 bits or narrower (e.g. the Game Boy Advance). In this situation, it usually makes sense to compile Thumb code and hand-optimise a few of the most CPU-intensive sections using the (non-Thumb) 32-bit instruction set, placing them in the limited 32-bit bus width memory. “GBA” redirects here. ...


The first processor with a Thumb instruction decoder was the ARM7TDMI. All ARM9 and later families, including XScale have included a Thumb instruction decoder. The XScale, a microprocessor core, is Intels implementation of the 5th generation of the ARM architecture, and consists of several distinct families: IXP, IXC, IOP and PXA (see more below). ...


Jazelle

A technology called Jazelle DBX (Direct Bytecode eXecution) allows some ARM architectures to execute Java bytecode in hardware as another execution state alongside the existing ARM and Thumb states. It provides acceleration for some bytecodes while calling out to special software for others. Java bytecode is the form of instructions that the Java virtual machine executes. ...


The first processor with Jazelle technology was the ARM926EJ-S[6]: Jazelle being denoted by the 'J' in the CPU name. It is used by mobile phone manufacturers to speed up execution of Java ME games and applications. Java Platform, Micro Edition or Java ME (formerly referred to as J2ME), is a runtime and collection of Java APIs for the development of software for resource constrained devices such as PDAs, cell phones and other consumer appliances. ...


Thumb-2

Thumb-2 technology made its debut in the ARM1156 core, announced in 2003. Thumb-2 extends the limited 16-bit instruction set of Thumb with additional 32-bit instructions to give the instruction set more breadth. The resulting stated aim for Thumb-2 is to achieve code density similar to Thumb with performance similar to the ARM instruction set on 32-bit memory.


Thumb-2 also extends both the ARM and Thumb instruction set with yet more instructions, including bit-field manipulation, table branches, and conditional execution.


All ARMv7 chips support the Thumb-2 instruction set. Some chips, such as the Cortex-M3, support only the Thumb-2 instruction set. Other chips in the Cortex and ARM11 series support both "ARM instruction set mode" and "Thumb-2 instruction set mode" [5] [6] [7].


Thumb Execution Environment (ThumbEE)

ThumbEE, also known as Thumb-2EE, and marketed as Jazelle RCT, was announced in 2005, first appearing in the Cortex-A8 processor. ThumbEE provides a small extension to the Thumb-2 extended Thumb instruction set, making the instruction set particularly suited to code generated at runtime (e.g. by JIT compilation) in managed Execution Environments. ThumbEE is a target for languages such as Limbo, Java, C#, Perl and Python, and allows JIT compilers to output smaller compiled code without impacting performance. For other uses, see Just In Time. ... Limbo is a programming language for writing distributed systems and is the language used to write applications for the Inferno operating system. ... “Java language” redirects here. ... The title given to this article is incorrect due to technical limitations. ... Wikibooks has a book on the topic of Perl Programming Perl is a dynamic programming language created by Larry Wall and first released in 1987. ... Python is a high-level programming language first released by Guido van Rossum in 1991. ... See also Just in time for the business technique In computing, just-in-time compilation (JIT), also known as dynamic translation, is a technique for improving the performance of interpreted programs. ...


New features provided by ThumbEE include automatic null pointer checks on every load and store instruction, an instruction to perform an array bounds check. Access to registers r8-r15 (where the Jazelle/DBX Java VM state is held) and the ability to branch to handlers—small sections of frequently called code—commonly used to implement a feature of a high level language, such as allocating memory for a new object.


Advanced SIMD (NEON)

The Advanced SIMD extension, marketed as NEON technology, is a combined 64 and 128 bit SIMD (Single Instruction Multiple Data) instruction set that provides standardized acceleration for media and signal processing applications. NEON can execute MP3 audio decoding on CPUs running at 10 MHz and can run the GSM AMR (Adaptive Multi-Rate) speech codec at no more than 13 MHz. It features a comprehensive instruction set, separate register files and independent execution hardware. NEON supports 8-, 16-, 32- and 64-bit integer and single precision floating-point data and operates in SIMD operations for handling audio/video processing as well as graphics and gaming processing. In NEON, the SIMD supports up to 16 operations at the same time.-1... Global System for Mobile communications (GSM: originally from Groupe Spécial Mobile) is the most popular standard for mobile phones in the world. ... A codec is a device or program capable of performing encoding and decoding on a digital data stream or signal. ... -1...


VFP

VFP technology is a coprocessor extension to the ARM architecture. It provides low-cost single-precision and double-precision floating-point computation fully compliant with the ANSI/IEEE Std 754-1985 Standard for Binary Floating-Point Arithmetic. VFP provides floating-point computation suitable for a wide spectrum of applications such as PDAs, smartphones, voice compression and decompression, three-dimensional graphics and digital audio, printers, set-top boxes, and automotive applications. The VFP architecture also supports execution of short vector instructions allowing SIMD (Single Instruction Multiple Data) parallelism. This is useful in graphics and signal-processing applications by reducing code size and increasing throughput. The IEEE Standard for Binary Floating-Point Arithmetic (IEEE 754) is the most widely-used standard for floating-point computation, and is followed by many CPU and FPU implementations. ... -1...


Other floating-point and/or SIMD coprocessors found in ARM-based processors include FPA, FPE, iwMMXt. They provide some of the same functionality as VFP but are not opcode-compatible with it. MMX is a SIMD instruction set designed by Intel, introduced in 1997 in their Pentium MMX microprocessors. ... Microprocessors perform operations using binary bits (on/off/1or0). ...


Security Extensions (TrustZone)

The Security Extensions, marketed as TrustZone(TM) Technology, is found in ARMv6KZ and later application profile architectures. It provides a low cost alternative to adding an additional dedicated security core to a SoC, by providing two virtual processors backed by hardware based access control. This enables the application core to switch between two states (referred to as worlds to reduce confusion with other names for capability domains) in a manner such that information can be prevented from leaking from the more trusted world to the less trusted world. This world switch is generally orthogonal to all other capabilities of the processor and so each world can operate independently of the other while using the same core. Memory and peripherals are then made aware of the operating world of the core and may use this to provide access control to secrets and code on the device. A typical application of TrustZone Technology is to run a rich operating system in the less trusted world, and smaller security-specialized code in the more trusted world. System-on-a-chip (SoC or SOC) is an idea of integrating all components of a computer system into a single chip. ...


ARM licensees

ARM Ltd does not manufacture and sell CPU devices based on their own designs, but rather, licenses the processor architecture to interested parties. ARM offers a variety of licensing terms, varying in cost and deliverables. To all licensees, ARM provides an integratable hardware description of the ARM core, as well as complete software development toolset (compiler, debugger, SDK), and the right to sell manufactured silicon containing the ARM CPU. Fabless licensees, who wish to integrate an ARM core into their own chip design, are usually only interested in acquiring a ready-to-manufacture verified IP core. For these customers, ARM delivers a gate netlist description of the chosen ARM core, along with an abstracted simulation model and test programs to aid design integration and verification. More ambitious customers, including integrated device manufacturers (IDM) and foundry operators, choose to acquire the processor IP in synthesizable RTL (Verilog) form. With the synthesizable RTL, the customer has the ability to perform architectural level optimizations and extensions. This allows the designer to achieve exotic design goals not otherwise possible with an unmodified netlist (high clock speed, very low power consumption, instruction set extensions, etc.). While ARM does not grant the licensee the right to resell the ARM architecture itself, licensees may freely sell manufactured product (chip devices, evaluation boards, complete systems, etc.). Merchant foundries can be a special case; not only are they allowed to sell finished silicon containing ARM cores, they generally hold the right to remanufacture ARM cores for other customers. A diagram of the operation of a typical multi-language, multi-target compiler. ... A debugger is a computer program that is used to test and debug other programs. ... A Software Development Kit, or SDK for short, is typically a set of development tools that allows a software engineer to create applications for a certain software package, software framework, hardware platform, computer system, operating system or similar. ... Not to be confused with Silicone. ... In electronic design and electronic design automation an intellectual property block, IP-block or IP core is a unit of reusable design, the use of which has been licensed to a third party. ... Verilog is a hardware description language (HDL) used to model electronic systems. ... Merchants function as professionals who deal with trade, dealing in commodities that they do not produce themselves, in order to produce profit. ... A foundry is a factory which produces castings of metal, both ferrous and non-ferrous. ...


Like most IP vendors, ARM prices its IP based on perceived value. In architectural terms, the lower performance ARM cores command a lower license cost than the higher performance cores. In terms of silicon implementation, a synthesizable core is more expensive than a hard macro (blackbox) core. Complicating price matters, a merchant foundry who holds an ARM license (such as Samsung and Fujitsu) can offer reduced licensing costs to its fab customers. In exchange for acquiring the ARM core through the foundry's in-house design services, the customer can reduce or eliminate payment of ARM's upfront license fee. Compared to dedicated semiconductor foundries (such as TSMC and UMC) without in-house design services, Fujitsu/Samsung charge 2 to 3 times more per manufactured wafer. For low to mid volume applications, a design service foundry offers lower overall pricing (through subsidization of the license fee). For high volume mass produced parts, the long term cost reduction achievable through lower wafer pricing reduces the impact of ARM's NRE (Non-Recurring Engineering) costs, making the dedicated foundry a better choice. Taiwan Semiconductor Manufacturing Company, Limited (Traditional Chinese: 台灣積體電路製造股份有限公司, abbrev. ... UMC (United Microelectronics Corporation) was founded in 1980, as Taiwans first Semiconductor company. ...


Many semiconductor or IC design firms hold ARM licenses: Analog Devices, Atmel, Broadcom, Cirrus Logic, Faraday technology, Freescale (spun off from Motorola in 2004), Fujitsu, Intel (through its settlement with DEC), IBM, Infineon Technologies, Nintendo, NXP Semiconductors (spun off from Philips in 2006), OKI, Samsung, Sharp, STMicroelectronics, Texas Instruments and VLSI are some of the many companies who have licensed the ARM in one form or another. Although ARM's license terms are covered by NDA, within the IP industry, ARM is widely known to be among the most expensive CPU cores. A single customer product containing a basic ARM core can incur a one-time license fee in excess of (USD) $200,000. Where significant quantity and architectural modification are involved, the license fee can exceed $10M.[citation needed] Analog Devices (NYSE: ADI) is an American multinational producer of semiconductor devices. ... Atmel ATMEGA32 microcontroller Atmel AT90S2333 microcontroller Atmel Corporation (NASDAQ: ATML) is a manufacturer of semiconductors, founded in 1984. ... Broadcom Corporation is a leading American supplier of integrated circuits (ICs) for broadband communications. ... Cirrus Logic NASDAQ: CRUS is a fabless semiconductor supplier specializing in analog, mixed-signal, and DSP chips. ... American corporation Freescale Semiconductor, Inc. ... Motorola Inc. ... For the district in Saga, Japan, see Fujitsu, Saga. ... Intel Corporation (NASDAQ: INTC, SEHK: 4335), founded in 1968 as Integrated Electronics Corporation, is an American multinational corporation that is best known for designing and manufacturing microprocessors and specialized integrated circuits. ... DEC, dec or Dec may refer to: December - a month of the year in the Gregorian Calendar Department of Environment and Conservation Digital Equipment Corporation - a computer and technology company, now part of HP Declination - a term from astronomy Diethylcarbamazine - a drug commonly used to treat infections by filarial parasites... International Business Machines Corporation (IBM, or colloquially, Big Blue) (NYSE: IBM) (incorporated June 15, 1911, in operation since 1888) is headquartered in Armonk, New York, USA. The company manufactures and sells computer hardware, software, and services. ... Infineon Technologies AG (ISIN: DE0006231004, FWB: IFX, NYSE: IFX) was founded in April 1999 when the semiconductor operations of parent company, Siemens AG, were spun off to form a separate legal entity. ... Nintendo Company, Limited (任天堂 or ニンテンドー Nintendō; NASDAQ: NTDOY, TYO: 7974 usually referred to as simply Nintendo, or Big N ) is a multinational corporation founded on September 23, 1889[1] in Kyoto, Japan by Fusajiro Yamauchi to produce handmade hanafuda cards. ... For other uses of NXP, see NXP (disambiguation). ... Philips HQ in Amsterdam Koninklijke Philips Electronics N.V. (Royal Philips Electronics N.V.), usually known as Philips, (Euronext: PHIA, NYSE: PHG) is one of the largest electronics companies in the world, founded and headquartered in the Netherlands. ... Oki Electric Industry Co. ... Samsung Electronics (SEC, Hangul:삼성전자; KSE: 005930, KSE: 005935, LSE: SMSN, LSE: SMSD) is a South Korean multinational corporation and the worlds largest and leading electronics and information technology company. ... Sharp Corporation ) (TYO: 6753 , LuxSE: SRP) is a Japanese electronics manufacturer, founded in 1912. ... STMicroelectronics is an international leading supplier of semiconductors. ... Texas Instruments (NYSE: TXN), better known in the electronics industry (and popularly) as TI, is an American company based in Dallas, Texas, USA, renowned for developing and commercializing semiconductor and computer technology. ... VLSI Technology, Inc was a company which designed and manufactured custom and semi-custom ICs. ... A non-disclosure agreement (NDA), also called a confidential disclosure agreement (CDA), confidentiality agreement or secrecy agreement, is a legal contract between at least two parties which outlines confidential materials or knowledge the parties wish to share with one another for certain purposes, but wish to restrict from generalized use. ...


Approximate licensing costs

ARM's 2006 annual report and accounts state that royalties totalling 88.7 million GBP (164.1 million USD) were the result of licensees shipping 2.45 billion units[7]. This is equivalent to 0.036 GBP (0.067 USD) per unit shipped. However, this is averaged across all cores, including expensive new cores and inexpensive older cores.


In the same year ARM's licensing revenues for processor cores were £65.2 million ($119.5 million)[8], in a year when 65 processor licenses were signed[9], an average of 1 million GBP (1.84 million USD) per license. Again, this is averaged across both new and old cores.


Given that ARM's 2006 income from processor cores was approximately 60% from royalties and 40% from licenses, ARM makes the equivalent of 0.06 GBP (0.11 USD) per unit shipped including both royalties and licenses. However, as one-off licenses are typically bought for new technologies, unit sales (and hence royalties) are dominated by more established products. Hence, these figures above do not reflect the true costs of any single ARM product.


See also

Inferno is an operating system for creating and supporting distributed services. ... DirectBandâ„¢ is a North American wireless datacast network owned and operated by Microsoft. ... AMULET is a series of microprocessors that implement the ARM processor architecture. ... This article may be excessively or inappropriately using first, second or third person, contrary to the formal tone expected of an encyclopedia entry. ... Texas Instruments OMAP is a Texas Instruments proprietary microprocessor for multimedia applications. ... ARM Instruction Set Simulator, Armulator, is one of the software development tools provided by ARM Limited to all licensees of the ARM architecture. ...

References

  1. ^ http://www.arm.com/miscPDFs/3823.pdf
  2. ^ "Some facts about the Acorn RISC Machine" Roger Wilson posting to comp.arch, Nov 2 1988, Accessed 25 May 2007.
  3. ^ "ARM Extends Cortex Family with First Processor Optimized for FPGA", ARM press release, March 19 2007. Accessed April 11, 2007.
  4. ^ "ARM Cortex-M1", ARM product website. Accessed April 11, 2007.
  5. ^ http://www.arm.com/news/17017.html
  6. ^ http://www.us.design-reuse.com/news/news6919.html
  7. ^ "Business review/Financial review/IFRS", p. 10, ARM annual report and accounts, 2006. Retrieved May 7, 2007
  8. ^ Based on total 110.6 million GBP (202.5 million USD) divided by "License revenues by product"; "Business review/Financial review/IFRS" and "Key performance indicators" respectively, p. 10 / p. 3ARM annual report and accounts, 2006. Retrieved May 7, 2007
  9. ^ "Key performance indicators", p. 3, ARM annual report and accounts, 2006. Retrieved May 7, 2007

Sophie Wilson, formerly Roger Wilson, is a British computer scientist. ... is the 127th day of the year (128th in leap years) in the Gregorian calendar. ... Year 2007 (MMVII) is the current year, a common year starting on Monday of the Gregorian calendar and the AD/CE era in the 21st Century. ... is the 127th day of the year (128th in leap years) in the Gregorian calendar. ... Year 2007 (MMVII) is the current year, a common year starting on Monday of the Gregorian calendar and the AD/CE era in the 21st Century. ... is the 127th day of the year (128th in leap years) in the Gregorian calendar. ... Year 2007 (MMVII) is the current year, a common year starting on Monday of the Gregorian calendar and the AD/CE era in the 21st Century. ...

External links


  Results from FactBites:
 
ARM architecture: Information from Answers.com (2405 words)
The ARM architecture (originally the Acorn RISC Machine) is a 32-bit RISC processor architecture that is widely used in a number of embedded designs.
ARM CPUs are found in all corners of consumer electronics, from portable devices (PDAs, mobile phones, media players, handheld gaming units, and calculators) to computer peripherals (hard drives, desktop routers.) The most noticeable branch in this family nowadays is Intel's XScale.
ARM has implemented a technology that allows certain of their architectures to execute Java bytecode natively in hardware, as another execution mode.
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